Re: execution order

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Hi Kövesdi,

> Is there any possibility to tell the compiler such a dependency?

Are those variables which map to hardware registers indicated as such (e.g.,
volatile), so the compiler is informed that they cannot be subject to
certain optimizations?

When I worked on code that had memory mapped I/O registers, I had take
special care in the code to mark the variable which referenced that memory
mapped I/O location as volatile.

Since one memory mapped I/O register spanned 4 bytes, I also had to take
extra-special care to make sure reading/writing 1 byte did not befoul the
other 4 bytes (since the architecture had a 32-bit data bus, and could not
read/write 1 byte on the bus at a time ... the GCC compiler would generate
not-so-helpful muxing code to shift and mask for me, otherwise).

But I did not have inter-dependent volatiles, such as "set a byte in memory
mapped I/O port X, and then set a byte in memory mapped I/O port Y to 'send'
the byte in X".  Is that (more or less) your situation?

HTH,
--Eljay



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