On Sun, 23 Feb 2025 11:31:36 +0200, Cristian Ciocaltea wrote:
> As a followup to getting basic HDMI1 output support [1] merged upstream,
> make use of the HDMI1 PHY PLL to provide better VOP2 display modes
> handling for the second HDMI output port on RK3588 SoC, similarly to
> what has been achieved recently for HDMI0 [2].
>
> Please note Heiko's fix [3] in of_clk_get_hw_from_clkspec() is also
> required for boards that do not provide HDMI0 output, that is to ensure
> devm_clk_get_optional() returns NULL instead of ERR_PTR(-EPROBE_DEFER),
> which otherwise would put rockchip-drm module in a permanent deferred
> probe mode.
>
> [...]
Applied, thanks!
[1/5] drm/rockchip: vop2: Improve display modes handling on RK3588 HDMI1
commit: f8dd7fc9ba88bc4a6ea85269287a51fb756440e2
[2/5] drm/rockchip: vop2: Consistently use dev_err_probe()
commit: b06d1ef3355571383cdb463cf0195b7a02efdfbf
Best regards,
--
Heiko Stuebner <heiko@xxxxxxxxx>
