Re: [RFC PATCH v1 12/14] riscv: dts: Add Video Output clock and syscon regmap nodes

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On 03/12/2024 14:41, Michal Wilczynski wrote:
> The address space controlling the Video Output (VO) subsystem clocks
> also contains control registers for GPU resets. To properly synchronize
> access to this shared address space, create a syscon Device Tree node
> for the VO registers and reference it in the clock controller node.
> 
> This change ensures coordinated access to the VO registers between the
> clock controller and other drivers, preventing conflicts and maintaining
> system stability.
> 
> Signed-off-by: Michal Wilczynski <m.wilczynski@xxxxxxxxxxx>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index dc2d554b4a71..39d39059160d 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -489,6 +489,18 @@ clk: clock-controller@ffef010000 {
>  			#clock-cells = <1>;
>  		};
>  
> +		vosys_clk: clock-controller {

Missing address space. You cannot have here nodes without unit address.

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

> +			compatible = "thead,th1520-clk-vo";
> +			thead,vosys-regmap = <&vosys_reg>;
> +			#clock-cells = <1>;
> +		};
> +
> +		vosys_reg: vosys@ffef528000 {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation



> +			compatible = "thead,th1520-vosys", "syscon";
> +			reg = <0xff 0xef528000 0x0 0x1000>;
> +			status = "okay";

Where is it disabled? Drop.

Best regards,
Krzysztof



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