On Thu, Sep 26, 2024 at 2:17 PM Antonino Maniscalco <antomani103@xxxxxxxxx> wrote: > > This patch implements preemption feature for A6xx targets, this allows > the GPU to switch to a higher priority ringbuffer if one is ready. A6XX > hardware as such supports multiple levels of preemption granularities, > ranging from coarse grained(ringbuffer level) to a more fine grained > such as draw-call level or a bin boundary level preemption. This patch > enables the basic preemption level, with more fine grained preemption > support to follow. > > Reviewed-by: Akhil P Oommen <quic_akhilpo@xxxxxxxxxxx> > Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8650-QRD > Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8550-QRD > Tested-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> # on SM8450-HDK > Signed-off-by: Sharat Masetty <smasetty@xxxxxxxxxxxxxx> > Signed-off-by: Antonino Maniscalco <antomani103@xxxxxxxxx> > --- > drivers/gpu/drm/msm/Makefile | 1 + > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 283 +++++++++++++++++++++- > drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 168 +++++++++++++ > drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 377 ++++++++++++++++++++++++++++++ > drivers/gpu/drm/msm/msm_ringbuffer.h | 7 + > 5 files changed, 825 insertions(+), 11 deletions(-) > [snip] > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index 6e065500b64d6d95599d89c33e6703c92f210047..355a3e210335d60a5bed0ee287912271c353402a 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c [snip] > @@ -784,6 +1015,16 @@ static int a6xx_ucode_load(struct msm_gpu *gpu) > msm_gem_object_set_name(a6xx_gpu->shadow_bo, "shadow"); > } > > + a6xx_gpu->pwrup_reglist_ptr = msm_gem_kernel_new(gpu->dev, PAGE_SIZE, > + MSM_BO_WC | MSM_BO_MAP_PRIV, > + gpu->aspace, &a6xx_gpu->pwrup_reglist_bo, > + &a6xx_gpu->pwrup_reglist_iova); Couldn't this also be MSM_BO_GPU_READONLY? And same for the preempt_postamble_ptr, I assume? Also, it looks like we are only writing the smmu_info from the kernel.. is there any way that could be split out into a RO buffer? BR, -R > + > + if (IS_ERR(a6xx_gpu->pwrup_reglist_ptr)) > + return PTR_ERR(a6xx_gpu->pwrup_reglist_ptr); > + > + msm_gem_object_set_name(a6xx_gpu->pwrup_reglist_bo, "pwrup_reglist"); > + > return 0; > } >
