Re: [PATCH 02/13] clk: rockchip: Set parent rate for DCLK_VOP clock on RK3228

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On 2024-06-17 22:50, Jonas Karlman wrote:
On 2024-06-17 22:30, Heiko Stübner wrote:
Am Samstag, 15. Juni 2024, 19:03:53 CEST schrieb Jonas Karlman:
Similar to DCLK_LCDC on RK3328, the DCLK_VOP on RK3228 is typically
parented by the hdmiphy clk and it is expected that the DCLK_VOP and
hdmiphy clk rate are kept in sync.

Use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT flags, same as used
on RK3328, to make full use of all possible supported display modes.

Fixes: 0a9d4ac08ebc ("clk: rockchip: set the clock ids for RK3228 VOP") Fixes: 307a2e9ac524 ("clk: rockchip: add clock controller for rk3228")
Signed-off-by: Jonas Karlman <jonas@xxxxxxxxx>

did your mailer have a hickup? Somehow I got patch2 (only this one)
2 times

Strange, not something I know about, each patch 1-13 are listed as 250
Accepted (heiko@xxxxxxxxx) and patches arrived to the ML and patchwork:

https://lore.kernel.org/all/20240615170417.3134517-1-jonas@xxxxxxxxx/
https://patchwork.freedesktop.org/series/134926/
https://patchwork.kernel.org/cover/13699322/

It might be that something is wrong with the MX host for sntech.de, I got one email rejected today with "invalid certificate" (or something like that)
as the error message.



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