On 25.04.24 22:30, Adam Ford wrote:
> On Thu, Apr 25, 2024 at 4:19 AM Marek Szyprowski
> <m.szyprowski@xxxxxxxxxxx> wrote:
>>
>> On 12.02.2024 00:09, Adam Ford wrote:
>>> When using video sync pulses, the HFP, HBP, and HSA are divided between
>>> the available lanes if there is more than one lane. For certain
>>> timings and lane configurations, the HFP may not be evenly divisible.
>>> If the HFP is rounded down, it ends up being too small which can cause
>>> some monitors to not sync properly. In these instances, adjust htotal
>>> and hsync to round the HFP up, and recalculate the htotal.
>>>
>>> Tested-by: Frieder Schrempf <frieder.schrempf@xxxxxxxxxx> # Kontron BL i.MX8MM with HDMI monitor
>>> Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
>>
>> Tested-by: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx>
>
> Thank you very much for testing!
>
>>
>>> ---
>>> V2: No changes
>>>
>>> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
>>> index 8476650c477c..52939211fe93 100644
>>> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
>>> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
>>> @@ -1606,6 +1606,27 @@ static int samsung_dsim_atomic_check(struct drm_bridge *bridge,
>>> adjusted_mode->flags |= (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
>>> }
>>>
>>> + /*
>>> + * When using video sync pulses, the HFP, HBP, and HSA are divided between
>>> + * the available lanes if there is more than one lane. For certain
>>> + * timings and lane configurations, the HFP may not be evenly divisible.
>>> + * If the HFP is rounded down, it ends up being too small which can cause
>>> + * some monitors to not sync properly. In these instances, adjust htotal
>>> + * and hsync to round the HFP up, and recalculate the htotal. Through trial
>>> + * and error, it appears that the HBP and HSA do not appearto need the same
>>> + * correction that HFP does.
>>> + */
>>> + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE && dsi->lanes > 1) {
>
> Frieder & Marek S,
>
> Marek V is proposing we eliminate the check against the flags and do
> it unconditionally. If I send you both a different patch, would you
> be willing to try them on your platforms? I don't want to risk
> breaking a board.
> I used the check above from the NXP downstream kernel, so it felt
> safe, but I am not as familiar with the different DSI modes, so I am
> not sure what the impact would be if this read:
>
> if (dsi->lanes > 1) {
>
> Does anyone else have an opinion on this?
My test only covers hardware with the ADV7535 which sets
MIPI_DSI_MODE_VIDEO_SYNC_PULSE. Doing the test without the check for
this flag won't make any difference in this case and it's therefore not
worth repeating the test.
