Re: [PATCH v3 6/7] arm64: dts: qcom: sm8650: add GPU nodes

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On 12/03/2024 01:20, Konrad Dybcio wrote:


On 2/16/24 12:03, Neil Armstrong wrote:
Add GPU nodes for the SM8650 platform.

Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
  1 file changed, 166 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
index 62e6ae93a9a8..27dcef27b6ad 100644
--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
@@ -2589,6 +2589,128 @@ tcsr: clock-controller@1fc0000 {
              #reset-cells = <1>;
          };
+        gpu: gpu@3d00000 {
+            compatible = "qcom,adreno-43051401", "qcom,adreno";
+            reg = <0x0 0x03d00000 0x0 0x40000>,
+                  <0x0 0x03d9e000 0x0 0x1000>,
+                  <0x0 0x03d61000 0x0 0x800>;
+            reg-names = "kgsl_3d0_reg_memory",
+                    "cx_mem",
+                    "cx_dbgc";
+
+            interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+
+            iommus = <&adreno_smmu 0 0x0>,
+                 <&adreno_smmu 1 0x0>;
+
+            operating-points-v2 = <&gpu_opp_table>;
+
+            qcom,gmu = <&gmu>;
+
+            status = "disabled";
+
+            zap-shader {
+                memory-region = <&gpu_micro_code_mem>;
+            };
+
+            /* Speedbin needs more work on A740+, keep only lower freqs */
+            gpu_opp_table: opp-table {
+                compatible = "operating-points-v2";
+
+                opp-680000000 {
+                    opp-hz = /bits/ 64 <680000000>;
+                    opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+                };

I got a memo from krzk that we should be sorting OPPs low-to-high,
could you please reorder these (and under gmu)?

Ack, I also add 3 more OPPs that works with all speedbins.

Neil


Otherwise lgtm

Konrad




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