On Tue, 28 Mar 2023 22:37:51 +0530, Jagan Teki wrote:
> For a given bridge pipeline if any bridge sets pre_enable_prev_first
> flag then the pre_enable for the previous bridge will be called before
> pre_enable of this bridge and opposite is done for post_disable.
>
> These are the potential bridge flags to alter bridge init order in order
> to satisfy the MIPI DSI host and downstream panel or bridge to function.
> However the existing pre_enable_prev_first logic with associated bridge
> ordering has broken for both pre_enable and post_disable calls.
>
> [...]
Please excuse the delay, patches touching the core bridge code are a little
bit tougher to merge due to increased risks of breaking unrelated things.
Applied, thanks!
[1/2] drm/bridge: Fix improper bridge init order with pre_enable_prev_first
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=e18aeeda0b69
[2/2] drm/bridge: Document bridge init order with pre_enable_prev_first
https://cgit.freedesktop.org/drm/drm-misc/commit/?id=113cc3ad8566
Rob
