Now that the plane state is fully programmed into the hardware before
the scanout is started there is no need to program the plane framebuffer
DMA address from the CRTC atomic_enable anymore.
Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
Reviewed-by: Marek Vasut <marex@xxxxxxx>
---
v2/3: no changes
---
drivers/gpu/drm/mxsfb/lcdif_kms.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/mxsfb/lcdif_kms.c b/drivers/gpu/drm/mxsfb/lcdif_kms.c
index 1b90014d055a..a5859c83fe08 100644
--- a/drivers/gpu/drm/mxsfb/lcdif_kms.c
+++ b/drivers/gpu/drm/mxsfb/lcdif_kms.c
@@ -529,7 +529,6 @@ static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc,
crtc->primary);
struct drm_display_mode *m = &lcdif->crtc.state->adjusted_mode;
struct drm_device *drm = lcdif->drm;
- dma_addr_t paddr;
clk_set_rate(lcdif->clk, m->crtc_clock * 1000);
@@ -541,15 +540,6 @@ static void lcdif_crtc_atomic_enable(struct drm_crtc *crtc,
lcdif_crtc_mode_set_nofb(new_cstate, new_pstate);
- /* Write cur_buf as well to avoid an initial corrupt frame */
- paddr = drm_fb_dma_get_gem_addr(new_pstate->fb, new_pstate, 0);
- if (paddr) {
- writel(lower_32_bits(paddr),
- lcdif->base + LCDC_V8_CTRLDESCL_LOW0_4);
- writel(CTRLDESCL_HIGH0_4_ADDR_HIGH(upper_32_bits(paddr)),
- lcdif->base + LCDC_V8_CTRLDESCL_HIGH0_4);
- }
-
clk_prepare_enable(lcdif->clk);
lcdif_enable_controller(lcdif);
--
2.39.2
