Re: [PATCH 1/7] drm/msm/dpu: enable PINGPONG TE operations only when supported by HW

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On 27/07/2023 23:05, Marijn Suijten wrote:
On 2023-07-27 19:20:58, Dmitry Baryshkov wrote:
The DPU_PINGPONG_TE bit is set for all PINGPONG blocks on DPU < 5.0.
Rather than checking for the flag, check for the presense of the
corresponding interrupt line.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@xxxxxxxxxx>
---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
index 9298c166b213..912a3bdf8ad4 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c
@@ -296,7 +296,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(const struct dpu_pingpong_cfg *cfg,
  	c->idx = cfg->id;
  	c->caps = cfg;

In hindsight, maybe there's one patch missing from this series.  You
inlined _setup_intf_ops() later, but there's no patch inlining
_setup_pingpong_ops() which looks to be required for applying this
patch.

Yes, I missed it somehow.


- Marijn

- if (test_bit(DPU_PINGPONG_TE, &cfg->features)) {
+	if (cfg->intr_rdptr) {
  		c->ops.enable_tearcheck = dpu_hw_pp_enable_te;
  		c->ops.disable_tearcheck = dpu_hw_pp_disable_te;
  		c->ops.connect_external_te = dpu_hw_pp_connect_external_te;
--
2.39.2


--
With best wishes
Dmitry




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