On 7.05.2023 10:20, Krzysztof Kozlowski wrote: > On 05/05/2023 23:40, Konrad Dybcio wrote: >> Document the SM6375 MDSS. >> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxx> >> --- >> .../bindings/display/msm/qcom,sm6375-mdss.yaml | 216 +++++++++++++++++++++ >> 1 file changed, 216 insertions(+) >> > > Thank you for your patch. There is something to discuss/improve. > >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/qcom,rpmcc.h> >> + #include <dt-bindings/clock/qcom,sm6375-gcc.h> >> + #include <dt-bindings/clock/qcom,sm6375-dispcc.h> >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + #include <dt-bindings/power/qcom-rpmpd.h> >> + >> + display-subsystem@5e00000 { >> + compatible = "qcom,sm6375-mdss"; >> + reg = <0x05e00000 0x1000>; >> + reg-names = "mdss"; >> + >> + power-domains = <&dispcc MDSS_GDSC>; >> + >> + clocks = <&gcc GCC_DISP_AHB_CLK>, >> + <&dispcc DISP_CC_MDSS_AHB_CLK>, >> + <&dispcc DISP_CC_MDSS_MDP_CLK>; >> + clock-names = "iface", "ahb", "core"; >> + >> + interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-controller; >> + #interrupt-cells = <1>; >> + >> + iommus = <&apps_smmu 0x820 0x2>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges; >> + >> + display-controller@5e01000 { >> + compatible = "qcom,sm6375-dpu"; >> + reg = <0x05e01000 0x8e030>, >> + <0x05eb0000 0x2008>; >> + reg-names = "mdp", "vbif"; >> + >> + clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, >> + <&gcc GCC_DISP_HF_AXI_CLK>, >> + <&dispcc DISP_CC_MDSS_MDP_CLK>, >> + <&dispcc DISP_CC_MDSS_MDP_LUT_CLK>, >> + <&dispcc DISP_CC_MDSS_ROT_CLK>, >> + <&dispcc DISP_CC_MDSS_VSYNC_CLK>, >> + <&gcc GCC_DISP_THROTTLE_CORE_CLK>; >> + clock-names = "iface", >> + "bus", >> + "core", >> + "lut", >> + "rot", >> + "vsync", >> + "throttle"; > > Are you sure you have clocks in correct order? I see warnings... Right, testing *both* the DTs and bindings after making changes sounds like a good thing to stop forgetting.. Konrad > > Best regards, > Krzysztof >