[AMD Official Use Only - General]
Acked-by: Evan Quan <evan.quan@xxxxxxx>
> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of
> André Almeida
> Sent: Tuesday, July 12, 2022 3:35 AM
> To: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Koenig, Christian
> <Christian.Koenig@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; David
> Airlie <airlied@xxxxxxxx>; Daniel Vetter <daniel@xxxxxxxx>; Zhang, Hawking
> <Hawking.Zhang@xxxxxxx>; Zhou1, Tao <Tao.Zhou1@xxxxxxx>; Kuehling,
> Felix <Felix.Kuehling@xxxxxxx>; Xiao, Jack <Jack.Xiao@xxxxxxx>; amd-
> gfx@xxxxxxxxxxxxxxxxxxxxx; dri-devel@xxxxxxxxxxxxxxxxxxxxx; linux-
> kernel@xxxxxxxxxxxxxxx
> Cc: André Almeida <andrealmeid@xxxxxxxxxx>; kernel-dev@xxxxxxxxxx
> Subject: [PATCH v2 1/1] drm/amd/pm: Implement get GFXOFF status for
> vangogh
>
> Implement function to get current GFXOFF status for vangogh.
>
> Signed-off-by: André Almeida <andrealmeid@xxxxxxxxxx>
> ---
> Changes from v1:
> - Squash commits in a single one
>
> .../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 38
> +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> index e2d8ac90cf36..89504ff8e9ed 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
> @@ -46,6 +46,18 @@
> #undef pr_info
> #undef pr_debug
>
> +// Registers related to GFXOFF
> +// addressBlock: smuio_smuio_SmuSmuioDec
> +// base address: 0x5a000
> +#define mmSMUIO_GFX_MISC_CNTL 0x00c5
> +#define mmSMUIO_GFX_MISC_CNTL_BASE_IDX 0
> +
> +//SMUIO_GFX_MISC_CNTL
> +#define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff__SHIFT
> 0x0
> +#define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS__SHIFT
> 0x1
> +#define SMUIO_GFX_MISC_CNTL__SMU_GFX_cold_vs_gfxoff_MASK
> 0x00000001L
> +#define SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS_MASK
> 0x00000006L
> +
> #define FEATURE_MASK(feature) (1ULL << feature)
> #define SMC_DPM_FEATURE ( \
> FEATURE_MASK(FEATURE_CCLK_DPM_BIT) | \
> @@ -2045,6 +2057,31 @@ static int vangogh_mode2_reset(struct
> smu_context *smu)
> return vangogh_mode_reset(smu, SMU_RESET_MODE_2);
> }
>
> +/**
> + * vangogh_get_gfxoff_status - Get gfxoff status
> + *
> + * @smu: amdgpu_device pointer
> + *
> + * Get current gfxoff status
> + *
> + * Return:
> + * * 0 - GFXOFF (default if enabled).
> + * * 1 - Transition out of GFX State.
> + * * 2 - Not in GFXOFF.
> + * * 3 - Transition into GFXOFF.
> + */
> +static u32 vangogh_get_gfxoff_status(struct smu_context *smu)
> +{
> + struct amdgpu_device *adev = smu->adev;
> + u32 reg, gfxoff_status;
> +
> + reg = RREG32_SOC15(SMUIO, 0, mmSMUIO_GFX_MISC_CNTL);
> + gfxoff_status = (reg &
> SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS_MASK)
> + >>
> SMUIO_GFX_MISC_CNTL__PWR_GFXOFF_STATUS__SHIFT;
> +
> + return gfxoff_status;
> +}
> +
> static int vangogh_get_power_limit(struct smu_context *smu,
> uint32_t *current_power_limit,
> uint32_t *default_power_limit,
> @@ -2199,6 +2236,7 @@ static const struct pptable_funcs
> vangogh_ppt_funcs = {
> .post_init = vangogh_post_smu_init,
> .mode2_reset = vangogh_mode2_reset,
> .gfx_off_control = smu_v11_0_gfx_off_control,
> + .get_gfx_off_status = vangogh_get_gfxoff_status,
> .get_ppt_limit = vangogh_get_ppt_limit,
> .get_power_limit = vangogh_get_power_limit,
> .set_power_limit = vangogh_set_power_limit,
> --
> 2.37.0
