Hi, Bo-Chen:
On Fri, 2022-07-01 at 14:28 +0800, Bo-Chen Chen wrote:
> From: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx>
>
> This patch adds a embedded displayport driver for the MediaTek mt8195
> SoC.
>
> It supports the MT8195, the embedded DisplayPort units. It offers
> DisplayPort 1.4 with up to 4 lanes.
>
> The driver creates a child device for the phy. The child device will
> never exist without the parent being active. As they are sharing a
> register range, the parent passes a regmap pointer to the child so
> that
> both can work with the same register range. The phy driver sets
> device
> data that is read by the parent to get the phy device that can be
> used
> to control the phy properties.
>
> This driver is based on an initial version by
> Jitao shi <jitao.shi@xxxxxxxxxxxx>
>
> Signed-off-by: Markus Schneider-Pargmann <msp@xxxxxxxxxxxx>
> Signed-off-by: Guillaume Ranquet <granquet@xxxxxxxxxxxx>
> Signed-off-by: Bo-Chen Chen <rex-bc.chen@xxxxxxxxxxxx>
> ---
[snip]
> +
> +struct mtk_dp_timings {
> + struct videomode vm;
> + u8 frame_rate;
You just assign value to frame_rate, but you never use this frame_rate,
so drop it.
Regards,
CK
> +};
> +
[snip]
> +
> +static void mtk_dp_initialize_priv_data(struct mtk_dp *mtk_dp)
> +{
> + mtk_dp->train_info.link_rate = DP_LINK_BW_5_4;
> + mtk_dp->train_info.lane_count = mtk_dp->max_lanes;
> + mtk_dp->train_info.cable_plugged_in = false;
> + mtk_dp->train_info.cable_state_change = false;
> + memset(&mtk_dp->train_info.irq_sta, 0, sizeof(struct
> mtk_dp_irq_sta));
> +
> + mtk_dp->info.format = DP_PIXELFORMAT_RGB;
> + mtk_dp->info.depth = DP_MSA_MISC_8_BPC;
> + memset(&mtk_dp->info.timings, 0, sizeof(struct
> mtk_dp_timings));
> + mtk_dp->info.timings.frame_rate = 60;
> +}
> +
[snip]
> +
> +static void mtk_dp_parse_drm_mode_timings(struct mtk_dp *mtk_dp,
> + struct drm_display_mode
> *mode)
> +{
> + struct mtk_dp_timings *timings = &mtk_dp->info.timings;
> +
> + drm_display_mode_to_videomode(mode, &timings->vm);
> + timings->frame_rate = drm_mode_vrefresh(mode);
> +}
> +
