On Fri, 1 Jul 2022 at 13:00, Marek Vasut <marex@xxxxxxx> wrote: > > On 7/1/22 08:56, Liu Ying wrote: > > With LVDS dual link, up to 160MHz mode clock rate is supported. > > With LVDS single link, up to 80MHz mode clock rate is supported. > > Fix mode clock rate validation by swapping the maximum mode clock > > rates of the two link modes. > > > > Fixes: 463db5c2ed4a ("drm: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge") > > Cc: Andrzej Hajda <andrzej.hajda@xxxxxxxxx> > > Cc: Neil Armstrong <narmstrong@xxxxxxxxxxxx> > > Cc: Robert Foss <robert.foss@xxxxxxxxxx> > > Cc: Laurent Pinchart <Laurent.pinchart@xxxxxxxxxxxxxxxx> > > Cc: Jonas Karlman <jonas@xxxxxxxxx> > > Cc: Jernej Skrabec <jernej.skrabec@xxxxxxxxx> > > Cc: David Airlie <airlied@xxxxxxxx> > > Cc: Daniel Vetter <daniel@xxxxxxxx> > > Cc: Sam Ravnborg <sam@xxxxxxxxxxxx> > > Cc: Marek Vasut <marex@xxxxxxx> > > Cc: NXP Linux Team <linux-imx@xxxxxxx> > > Signed-off-by: Liu Ying <victor.liu@xxxxxxx> > > Reviewed-by: Marek Vasut <marex@xxxxxxx> Applied 1-2/3 to drm-misc-next. Picked Mareks patch for 3/3 since it was submitted first and is identical.