Am 25.03.21 um 14:17 schrieb Jason Gunthorpe:
On Thu, Mar 25, 2021 at 02:05:14PM +0100, Christian König wrote:
Am 25.03.21 um 13:42 schrieb Jason Gunthorpe:
On Thu, Mar 25, 2021 at 01:09:14PM +0100, Christian König wrote:
Am 25.03.21 um 13:01 schrieb Jason Gunthorpe:
On Thu, Mar 25, 2021 at 12:53:15PM +0100, Thomas Hellström (Intel) wrote:
Nope. The point here was that in this case, to make sure mmap uses the
correct VA to give us a reasonable chance of alignement, the driver might
need to be aware of and do trickery with the huge page-table-entry sizes
anyway, although I think in most cases a standard helper for this can be
supplied.
Of course the driver needs some way to influence the VA mmap uses,
gernally it should align to the natural page size of the device
Well a mmap() needs to be aligned to the page size of the CPU, but not
necessarily to the one of the device.
So I'm pretty sure the device driver should not be involved in any way the
choosing of the VA for the CPU mapping.
No, if the device wants to use huge pages it must influence the mmap
VA or it can't form huge pgaes.
No, that's the job of the core MM and not of the individual driver.
The core mm doesn't know the page size of the device, only which of
several page levels the arch supports. The device must be involevd
here.
Why? See you can have a device which has for example 256KiB pages, but
it should perfectly work that the CPU mapping is aligned to only 4KiB.
As long as you don't do things like shared virtual memory between device
and CPU the VA addresses used on the CPU should be completely irrelevant
for the device.
Regards,
Christian.
Jason
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