Hi Sandy,
On Thu, 25 Feb 2021 at 02:17, Huang Jiachai <hjc@xxxxxxxxxxxxxx> wrote:
> RK3399 and px30 can support YTR afbc format[RGB only], there is an
> hidden control bit to control this.
Great, thanks for providing this information!
> Hi Alyssa,
>
> Can you add the following patch to test on your platform? thanks.
>
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> index 99bdb5a2a185..0780ad46230a 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -105,7 +105,7 @@
> #define AFBC_FMT_U8U8U8U8 0x5
> #define AFBC_FMT_U8U8U8 0x4
>
> -#define AFBC_TILE_16x16 BIT(4)
> +#define AFBC_FMT_YTR BIT(4)
>
> /*
> * The coefficients of the following matrix are all fixed points.
> @@ -952,7 +952,9 @@ static void vop_plane_atomic_update(struct drm_plane
> *plane,
> if (rockchip_afbc(fb->modifier)) {
> int afbc_format =
> vop_convert_afbc_format(fb->format->format);
>
> - VOP_AFBC_SET(vop, format, afbc_format | AFBC_TILE_16x16);
> + if (fb->modifier & AFBC_FORMAT_MOD_YTR)
> + afbc_format |= AFBC_FMT_YTR;
> + VOP_AFBC_SET(vop, format, afbc_format);
> VOP_AFBC_SET(vop, hreg_block_split, 0);
> VOP_AFBC_SET(vop, win_sel, VOP_WIN_TO_INDEX(vop_win));
> VOP_AFBC_SET(vop, hdr_ptr, dma_addr);
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> index 4a2099cb582e..48e131b88c23 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -20,6 +20,7 @@
> #define ROCKCHIP_AFBC_MOD \
> DRM_FORMAT_MOD_ARM_AFBC( \
> AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE \
> + | AFBC_FORMAT_MOD_YTR \
> )
Looks good - this will help us confirm. I think the complete patch
though would advertise both YTR and non-YTR modifiers: per Arm's
recommendation, it sounds like [AX]RGB8888 formats should only
advertise the non-YTR variant, and [AX]BGR8888 should advertise both
variants. Does that make sense?
Cheers,
Daniel
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