Hi Maxime
On Mon, 11 Jan 2021 at 14:23, Maxime Ripard <maxime@xxxxxxxxxx> wrote:
>
> The HDMI controller found in the BCM2711 has an external interrupt
> controller for the CEC and hotplug interrupt shared between the two
> instances.
>
> Let's add a variant flag to register a single interrupt handler and
> deals with the interrupt handler setup, or two interrupt handlers
> relying on an external irqchip.
>
> Signed-off-by: Maxime Ripard <maxime@xxxxxxxxxx>
Looks good
Reviewed-by: Dave Stevenson <dave.stevenson@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/vc4/vc4_hdmi.c | 42 ++++++++++++++++++++++++++--------
> drivers/gpu/drm/vc4/vc4_hdmi.h | 7 ++++++
> 2 files changed, 39 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
> index 12ca5f3084af..d116ecfd8cf7 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
> @@ -1605,9 +1605,11 @@ static int vc4_hdmi_cec_adap_enable(struct cec_adapter *adap, bool enable)
> ((3600 / usecs) << VC4_HDMI_CEC_CNT_TO_3600_US_SHIFT) |
> ((3500 / usecs) << VC4_HDMI_CEC_CNT_TO_3500_US_SHIFT));
>
> - HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
> + if (!vc4_hdmi->variant->external_irq_controller)
> + HDMI_WRITE(HDMI_CEC_CPU_MASK_CLEAR, VC4_HDMI_CPU_CEC);
> } else {
> - HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
> + if (!vc4_hdmi->variant->external_irq_controller)
> + HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, VC4_HDMI_CPU_CEC);
> HDMI_WRITE(HDMI_CEC_CNTRL_5, val |
> VC4_HDMI_CEC_TX_SW_RESET | VC4_HDMI_CEC_RX_SW_RESET);
> }
> @@ -1682,8 +1684,6 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
> cec_fill_conn_info_from_drm(&conn_info, &vc4_hdmi->connector);
> cec_s_conn_info(vc4_hdmi->cec_adap, &conn_info);
>
> - HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
> -
> value = HDMI_READ(HDMI_CEC_CNTRL_1);
> /* Set the logical address to Unregistered */
> value |= VC4_HDMI_CEC_ADDR_MASK;
> @@ -1691,12 +1691,32 @@ static int vc4_hdmi_cec_init(struct vc4_hdmi *vc4_hdmi)
>
> vc4_hdmi_cec_update_clk_div(vc4_hdmi);
>
> - ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0),
> - vc4_cec_irq_handler,
> - vc4_cec_irq_handler_thread, 0,
> - "vc4 hdmi cec", vc4_hdmi);
> - if (ret)
> - goto err_delete_cec_adap;
> + if (vc4_hdmi->variant->external_irq_controller) {
> + ret = devm_request_threaded_irq(&pdev->dev,
> + platform_get_irq_byname(pdev, "cec-rx"),
> + vc4_cec_irq_handler_rx_bare,
> + vc4_cec_irq_handler_rx_thread, 0,
> + "vc4 hdmi cec rx", vc4_hdmi);
> + if (ret)
> + goto err_delete_cec_adap;
> +
> + ret = devm_request_threaded_irq(&pdev->dev,
> + platform_get_irq_byname(pdev, "cec-tx"),
> + vc4_cec_irq_handler_tx_bare,
> + vc4_cec_irq_handler_tx_thread, 0,
> + "vc4 hdmi cec tx", vc4_hdmi);
> + if (ret)
> + goto err_delete_cec_adap;
> + } else {
> + HDMI_WRITE(HDMI_CEC_CPU_MASK_SET, 0xffffffff);
> +
> + ret = devm_request_threaded_irq(&pdev->dev, platform_get_irq(pdev, 0),
> + vc4_cec_irq_handler,
> + vc4_cec_irq_handler_thread, 0,
> + "vc4 hdmi cec", vc4_hdmi);
> + if (ret)
> + goto err_delete_cec_adap;
> + }
>
> ret = cec_register_adapter(vc4_hdmi->cec_adap, &pdev->dev);
> if (ret < 0)
> @@ -2095,6 +2115,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi0_variant = {
> PHY_LANE_CK,
> },
> .unsupported_odd_h_timings = true,
> + .external_irq_controller = true,
>
> .init_resources = vc5_hdmi_init_resources,
> .csc_setup = vc5_hdmi_csc_setup,
> @@ -2121,6 +2142,7 @@ static const struct vc4_hdmi_variant bcm2711_hdmi1_variant = {
> PHY_LANE_2,
> },
> .unsupported_odd_h_timings = true,
> + .external_irq_controller = true,
>
> .init_resources = vc5_hdmi_init_resources,
> .csc_setup = vc5_hdmi_csc_setup,
> diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.h b/drivers/gpu/drm/vc4/vc4_hdmi.h
> index 6966db1a0957..d71f6ed321bf 100644
> --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
> +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
> @@ -64,6 +64,13 @@ struct vc4_hdmi_variant {
> /* The BCM2711 cannot deal with odd horizontal pixel timings */
> bool unsupported_odd_h_timings;
>
> + /*
> + * The BCM2711 CEC/hotplug IRQ controller is shared between the
> + * two HDMI controllers, and we have a proper irqchip driver for
> + * it.
> + */
> + bool external_irq_controller;
> +
> /* Callback to get the resources (memory region, interrupts,
> * clocks, etc) for that variant.
> */
> --
> 2.29.2
>
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