Applied. Thanks! Alex On Tue, Sep 22, 2020 at 9:11 AM Bernard Zhao <bernard@xxxxxxxx> wrote: > > Change the comment typo: "programm" -> "program". > > Signed-off-by: Bernard Zhao <bernard@xxxxxxxx> > --- > drivers/gpu/drm/radeon/uvd_v1_0.c | 4 ++-- > drivers/gpu/drm/radeon/uvd_v2_2.c | 2 +- > drivers/gpu/drm/radeon/uvd_v4_2.c | 2 +- > 3 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/radeon/uvd_v1_0.c b/drivers/gpu/drm/radeon/uvd_v1_0.c > index 800721153d51..58557c2263a7 100644 > --- a/drivers/gpu/drm/radeon/uvd_v1_0.c > +++ b/drivers/gpu/drm/radeon/uvd_v1_0.c > @@ -117,7 +117,7 @@ int uvd_v1_0_resume(struct radeon_device *rdev) > if (r) > return r; > > - /* programm the VCPU memory controller bits 0-27 */ > + /* program the VCPU memory controller bits 0-27 */ > addr = (rdev->uvd.gpu_addr >> 3) + 16; > size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size) >> 3; > WREG32(UVD_VCPU_CACHE_OFFSET0, addr); > @@ -360,7 +360,7 @@ int uvd_v1_0_start(struct radeon_device *rdev) > /* Set the write pointer delay */ > WREG32(UVD_RBC_RB_WPTR_CNTL, 0); > > - /* programm the 4GB memory segment for rptr and ring buffer */ > + /* program the 4GB memory segment for rptr and ring buffer */ > WREG32(UVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) | > (0x7 << 16) | (0x1 << 31)); > > diff --git a/drivers/gpu/drm/radeon/uvd_v2_2.c b/drivers/gpu/drm/radeon/uvd_v2_2.c > index 23b18edda20e..6266167886d9 100644 > --- a/drivers/gpu/drm/radeon/uvd_v2_2.c > +++ b/drivers/gpu/drm/radeon/uvd_v2_2.c > @@ -109,7 +109,7 @@ int uvd_v2_2_resume(struct radeon_device *rdev) > if (r) > return r; > > - /* programm the VCPU memory controller bits 0-27 */ > + /* program the VCPU memory controller bits 0-27 */ > addr = rdev->uvd.gpu_addr >> 3; > size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 4) >> 3; > WREG32(UVD_VCPU_CACHE_OFFSET0, addr); > diff --git a/drivers/gpu/drm/radeon/uvd_v4_2.c b/drivers/gpu/drm/radeon/uvd_v4_2.c > index dc54fa4aaea8..f9e97fa63674 100644 > --- a/drivers/gpu/drm/radeon/uvd_v4_2.c > +++ b/drivers/gpu/drm/radeon/uvd_v4_2.c > @@ -40,7 +40,7 @@ int uvd_v4_2_resume(struct radeon_device *rdev) > uint64_t addr; > uint32_t size; > > - /* programm the VCPU memory controller bits 0-27 */ > + /* program the VCPU memory controller bits 0-27 */ > > /* skip over the header of the new firmware format */ > if (rdev->uvd.fw_header_present) > -- > 2.28.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
