On Mon, Apr 13, 2020 at 6:11 PM Chen-Yu Tsai <wens@xxxxxxxx> wrote:
>
> On Mon, Apr 13, 2020 at 5:55 PM Jernej Skrabec <jernej.skrabec@xxxxxxxx> wrote:
> >
> > m divider in DDC clock register is 4 bits wide. Fix that.
> >
> > Fixes: 9c5681011a0c ("drm/sun4i: Add HDMI support")
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@xxxxxxxx>
>
> Reviewed-by: Chen-Yu Tsai <wens@xxxxxxxx>
Cc stable?
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