Applied. Thanks!
Alex
On Fri, Feb 28, 2020 at 4:36 PM Mario Kleiner
<mario.kleiner.de@xxxxxxxxx> wrote:
>
> This fixes a problem found on the MacBookPro 2017 Retina panel:
>
> The panel reports 10 bpc color depth in its EDID, and the
> firmware chooses link settings at boot which support enough
> bandwidth for 10 bpc (324000 kbit/sec aka LINK_RATE_RBR2
> aka 0xc), but the DP_MAX_LINK_RATE dpcd register only reports
> 2.7 Gbps (multiplier value 0xa) as possible, in direct
> contradiction of what the firmware successfully set up.
>
> This restricts the panel to 8 bpc, not providing the full
> color depth of the panel on Linux <= 5.5. Additionally, commit
> '4a8ca46bae8a ("drm/amd/display: Default max bpc to 16 for eDP")'
> introduced into Linux 5.6-rc1 will unclamp panel depth to
> its full 10 bpc, thereby requiring a eDP bandwidth for all
> modes that exceeds the bandwidth available and causes all modes
> to fail validation -> No modes for the laptop panel -> failure
> to set any mode -> Panel goes dark.
>
> This patch adds a quirk specific to the MBP 2017 15" Retina
> panel to override reported max link rate to the correct maximum
> of 0xc = LINK_RATE_RBR2 to fix the darkness and reduced display
> precision.
>
> Please apply for Linux 5.6+ to avoid regressing Apple MBP panel
> support.
>
> Signed-off-by: Mario Kleiner <mario.kleiner.de@xxxxxxxxx>
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index cb731c1d30b1..fd9e69634c50 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -3401,6 +3401,17 @@ static bool retrieve_link_cap(struct dc_link *link)
> sink_id.ieee_device_id,
> sizeof(sink_id.ieee_device_id));
>
> + /* Quirk Apple MBP 2017 15" Retina panel: Wrong DP_MAX_LINK_RATE */
> + {
> + uint8_t str_mbp_2017[] = { 101, 68, 21, 101, 98, 97 };
> +
> + if ((link->dpcd_caps.sink_dev_id == 0x0010fa) &&
> + !memcmp(link->dpcd_caps.sink_dev_id_str, str_mbp_2017,
> + sizeof(str_mbp_2017))) {
> + link->reported_link_cap.link_rate = 0x0c;
> + }
> + }
> +
> core_link_read_dpcd(
> link,
> DP_SINK_HW_REVISION_START,
> --
> 2.20.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
dri-devel mailing list
dri-devel@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/dri-devel
