On Wed, May 08, 2019 at 08:00:47PM -0700, Bjorn Andersson wrote: > On Wed 08 May 19:25 PDT 2019, Rob Clark wrote: > > > On Wed, May 8, 2019 at 7:16 PM Brian Masney <masneyb@xxxxxxxxxxxxx> wrote: > > > > > > On Mon, May 06, 2019 at 11:39:02PM -0700, Bjorn Andersson wrote: > > > > On Sun 05 May 06:04 PDT 2019, Brian Masney wrote: > > > > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > > > > [..] > > > > > + clocks = <&mmcc MDSS_MDP_CLK>, > > > > > + <&mmcc MDSS_AHB_CLK>, > > > > > + <&mmcc MDSS_AXI_CLK>, > > > > > + <&mmcc MDSS_BYTE0_CLK>, > > > > > + <&mmcc MDSS_PCLK0_CLK>, > > > > > + <&mmcc MDSS_ESC0_CLK>, > > > > > + <&mmcc MMSS_MISC_AHB_CLK>; > > > > > + clock-names = "mdp_core", > > > > > + "iface", > > > > > + "bus", > > > > > + "byte", > > > > > + "pixel", > > > > > + "core", > > > > > + "core_mmss"; > > > > > > > > Unless I enable MMSS_MMSSNOC_AXI_CLK and MMSS_S0_AXI_CLK I get some > > > > underrun error from DSI. You don't see anything like this? > > > > > > > > (These clocks are controlled by msm_bus downstream and should be driven > > > > by interconnect upstream) > > > > > > > > > > > > Apart from this, I think this looks nice. Happy to see the progress. > > > > > > No, I'm not seeing an underrun errors from the DSI. I think the clocks > > > are fine since I'm able to get this working with 4.17 using these same > > > clocks. I just sent out v2 and the cover letter has some details, along > > > with the full dmesg. > > > > since we don't have interconnect driver for 8974, I guess there is > > some chance that things work or not based on how lk leaves things? > > > > Right, I guess the bootloader on my device does not leave the busses > ticking - perhaps there's a boot splash involved on Brian's device? > > Regardless, this works on Nexus 5 and allows Brian to make further > progress so I'm all for merging it. There is a boot splash on the Nexus 5 and that may explain a behavior that I observed. I attempted to add reset GPIO support to the simple panel driver and the screen will clear but nothing will come on the screen after a hard reset, even on 4.17. To be sure, I got the timing information for how long to leave the GPIO high and low from the downstream MSM 3.4 sources. That's when I had a script port all of the ~400 panel on commands in the downstream device tree to a new panel driver. With the latest kernel kernel having a delay showing the console text, I observe a brief second where the boot splash is shown along with the startup text from Linux. A full refresh is performed and the boot splash goes away. I don't see this with the 4.17 kernel; perhaps maybe the full refresh occurs quick enough that its not noticeable. Can you point me to where the interconnect API is in the downstream MSM 3.4 sources? https://github.com/AICP/kernel_lge_hammerhead It looks like its in drivers/interconnect/ in the upstream sources. Brian _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
