On Mon, May 06, 2019 at 11:39:02PM -0700, Bjorn Andersson wrote: > On Sun 05 May 06:04 PDT 2019, Brian Masney wrote: > > diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi > [..] > > + clocks = <&mmcc MDSS_MDP_CLK>, > > + <&mmcc MDSS_AHB_CLK>, > > + <&mmcc MDSS_AXI_CLK>, > > + <&mmcc MDSS_BYTE0_CLK>, > > + <&mmcc MDSS_PCLK0_CLK>, > > + <&mmcc MDSS_ESC0_CLK>, > > + <&mmcc MMSS_MISC_AHB_CLK>; > > + clock-names = "mdp_core", > > + "iface", > > + "bus", > > + "byte", > > + "pixel", > > + "core", > > + "core_mmss"; > > Unless I enable MMSS_MMSSNOC_AXI_CLK and MMSS_S0_AXI_CLK I get some > underrun error from DSI. You don't see anything like this? > > (These clocks are controlled by msm_bus downstream and should be driven > by interconnect upstream) > > > Apart from this, I think this looks nice. Happy to see the progress. No, I'm not seeing an underrun errors from the DSI. I think the clocks are fine since I'm able to get this working with 4.17 using these same clocks. I just sent out v2 and the cover letter has some details, along with the full dmesg. Brian _______________________________________________ dri-devel mailing list dri-devel@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/dri-devel
