On Sun 05 May 06:04 PDT 2019, Brian Masney wrote:
> diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
[..]
> + dsi0: dsi@fd922800 {
> + status = "disabled";
> +
> + compatible = "qcom,mdss-dsi-ctrl";
> + reg = <0xfd922800 0x1f8>;
> + reg-names = "dsi_ctrl";
> +
> + interrupt-parent = <&mdss>;
> + interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
> +
> + assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
> + <&mmcc PCLK0_CLK_SRC>;
> + assigned-clock-parents = <&dsi_phy0 0>,
> + <&dsi_phy0 1>;
> +
> + clocks = <&mmcc MDSS_MDP_CLK>,
> + <&mmcc MDSS_AHB_CLK>,
> + <&mmcc MDSS_AXI_CLK>,
> + <&mmcc MDSS_BYTE0_CLK>,
> + <&mmcc MDSS_PCLK0_CLK>,
> + <&mmcc MDSS_ESC0_CLK>,
> + <&mmcc MMSS_MISC_AHB_CLK>;
> + clock-names = "mdp_core",
> + "iface",
> + "bus",
> + "byte",
> + "pixel",
> + "core",
> + "core_mmss";
Unless I enable MMSS_MMSSNOC_AXI_CLK and MMSS_S0_AXI_CLK I get some
underrun error from DSI. You don't see anything like this?
(These clocks are controlled by msm_bus downstream and should be driven
by interconnect upstream)
Apart from this, I think this looks nice. Happy to see the progress.
Regards,
Bjorn
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