[Bug 106188] Can't successfully set pstates in pp_od_clk_voltage

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Comment # 2 on bug 106188 from
Thanks for your response.

I somehow forgot the missing ">", whoops. I now almost got it working like
desired, thanks!

However, there is a small problem left: It doesn't switch into pstate 7.
I set up:
echo "manual" > /sys/class/drm/card0/device/power_dpm_force_performance_level

echo "s 0 214 721" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 1 389 721" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 2 844 725" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 3 1009 818" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 4 1079 875" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 5 1134 880" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 6 1179 890" > /sys/class/drm/card0/device/pp_od_clk_voltage
echo "s 7 1209 900" > /sys/class/drm/card0/device/pp_od_clk_voltage

echo "c" > /sys/class/drm/card0/device/pp_od_clk_voltage

But according to /sys/kernel/debug/dri/0/amdgpu_pm_info, pstate 6 (1179 890) is
the maximum of chosen clocks.
I set up Unigine Valley to run in 720p with 8xMSAA, so there is no high power
consumption which could make the GPU throttle down to a lower state, so it
definitely should switch to pstate 7.

I also tried making s 7 and s 6 the same, but then it's just limited to an even
lower pstate. So I fail to get to my desired 1209MHz 900mV.

It also seems like setting up power_dpm_force_performance_level to manual isn't
actually required, at least it doesn't make any difference here (or I'm missing
something).


Btw: Since I'm already bugging you with this :) :
Is there a way to also increase the maximum allowed power consumption?
There are /sys/class/drm/card0/device/hwmon/hwmon0/power1_cap and
/sys/class/drm/card0/device/hwmon/hwmon0/power1_cap_max containing the maximum
ASIC power (at least it looks to me that way), but I haven't been able to
successfully alter those to e.g. raise the limit of my Baffin GPU to 60 Watts.


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