Bug ID | 106188 |
---|---|
Summary | Can't successfully set pstates in pp_od_clk_voltage |
Product | DRI |
Version | unspecified |
Hardware | x86-64 (AMD64) |
OS | Linux (All) |
Status | NEW |
Severity | normal |
Priority | medium |
Component | DRM/AMDgpu |
Assignee | dri-devel@lists.freedesktop.org |
Reporter | tempel.julian@gmail.com |
Hello, I specified "amdgpu.ppfeaturemask=0xffffffff" as a boot parameter so I could access "/sys/class/drm/card0/device/pp_od_clk_voltage". The pstate table for source and memory clocks looks correct. When I run "echo "s 7 1209 900" /sys/class/drm/card0/device/pp_od_clk_voltage", it returns "s 7 1209 900 /sys/class/drm/card0/device/pp_od_clk_voltage". When I run "echo "c" /sys/class/drm/card0/device/pp_od_clk_voltage" afterwards, it returns "c /sys/class/drm/card0/device/pp_od_clk_voltage". However, the change is not applied. When I do "cat /sys/class/drm/card0/device/pp_od_clk_voltage", it still says "7: 1196Mhz 1006 mV". And when I run "watch -n 0.5 cat /sys/kernel/debug/dri/0/amdgpu_pm_info", it reports " 1196 MHz (SCLK) 981 mV (VDDGFX) ". Am I making a mistake somewhere or should it work like this? I also tried "echo "manual" > /sys/class/drm/card0/device/power_dpm_force_performance_level" and setting pstates 5-7, but that didn't help either. In the documentation, I read that pp_od_clk_voltage should also include OD_range, but it's not there for me. Linux drm-next-4.18-wip 4.16.1.52132fd03 MSI RX 560 Aero ITX Thanks!
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