Comment # 1
on bug 106188
from Alex Deucher
(In reply to tempel.julian from comment #0) > Hello, > I specified "amdgpu.ppfeaturemask=0xffffffff" as a boot parameter so I could > access "/sys/class/drm/card0/device/pp_od_clk_voltage". > The pstate table for source and memory clocks looks correct. > > When I run "echo "s 7 1209 900" > /sys/class/drm/card0/device/pp_od_clk_voltage", it returns "s 7 1209 900 > /sys/class/drm/card0/device/pp_od_clk_voltage". > When I run "echo "c" /sys/class/drm/card0/device/pp_od_clk_voltage" > afterwards, it returns "c /sys/class/drm/card0/device/pp_od_clk_voltage". > Are you redirecting to the file? Something like the following should work: echo "s 7 1209 900" > /sys/class/drm/card0/device/pp_od_clk_voltage > However, the change is not applied. When I do "cat > /sys/class/drm/card0/device/pp_od_clk_voltage", it still says "7: > 1196Mhz 1006 mV". > And when I run "watch -n 0.5 cat /sys/kernel/debug/dri/0/amdgpu_pm_info", > it reports > " 1196 MHz (SCLK) > 981 mV (VDDGFX) > ". > > Am I making a mistake somewhere or should it work like this? > > I also tried "echo "manual" > > /sys/class/drm/card0/device/power_dpm_force_performance_level" and setting > pstates 5-7, but that didn't help either. You have to set manual mode before you can manually edit the state. You also have to be root (or have permission) to write to these files. > In the documentation, I read that pp_od_clk_voltage should also include > OD_range, but it's not there for me. The patch is on the mailing list, but hasn't been committed yet. https://patchwork.freedesktop.org/patch/217812/
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