On 2010.08.23 08:02:42 +0200, Takashi Iwai wrote:
>
> Also, I don't understand the logic of 40bit addr calculation:
>
> > static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
> > dma_addr_t addr, int type)
> > {
> > /* Shift high bits down */
> > addr |= (addr >> 28) & 0xff;
>
> Isn't it 0xff0?
>
No. This depends on hw 32bit PTE format for sandybridge.
bit 31 bit 11 bit 4 bit 0
|<-physical addr 31:12->|<-physical addr 39:32->|<-cache ctl 3:1->|valid|
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