On Tue, May 07, 2024 at 02:54:34PM +0200, Amelie Delaunay wrote: > The STM32 DMA3 is a Direct Memory Access controller with different features > depending on its hardware configuration. > The channels have not the same capabilities, some have a larger FIFO, so > their performance is higher. > This patch describes STM32 DMA3 bindings, used to select a channel that > fits client requirements, and to pre-configure the channel depending on > the client needs. > > Signed-off-by: Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx> > --- > v2: > - DMA controller specific information description has been moved and > added as description of #dma-cells property > - description has been added to interrupts property specifying the > expected format for channel interrupts > - compatible has been updated to st,stm32mp25-dma3 (SoC specific) > --- > .../bindings/dma/stm32/st,stm32-dma3.yaml | 129 ++++++++++++++++++ > 1 file changed, 129 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > > diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > new file mode 100644 > index 000000000000..ed2a84fe2535 > --- /dev/null > +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dma3.yaml > @@ -0,0 +1,129 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma3.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STMicroelectronics STM32 DMA3 Controller > + > +description: | > + The STM32 DMA3 is a direct memory access controller with different features depending on its > + hardware configuration. > + It is either called LPDMA (Low Power), GPDMA (General Purpose) or HPDMA (High Performance). > + Its hardware configuration registers allow to dynamically expose its features. > + > + GPDMA and HPDMA support 16 independent DMA channels, while only 4 for LPDMA. > + GPDMA and HPDMA support 256 DMA requests from peripherals, 8 for LPDMA. > + > + Bindings are generic for these 3 STM32 DMA3 configurations. > + > + DMA clients connected to the STM32 DMA3 controller must use the format described in "#dma-cells" > + property description below, using a three-cell specifier for each channel. Wrap lines at 80 unless there is some exception to go to 100. > + > +maintainers: > + - Amelie Delaunay <amelie.delaunay@xxxxxxxxxxx> > + > +allOf: > + - $ref: /schemas/dma/dma-controller.yaml# > + > +properties: > + compatible: > + const: st,stm32mp25-dma3 > + > + reg: > + maxItems: 1 > + > + interrupts: > + minItems: 4 > + maxItems: 16 > + description: | Don't need '|' if no formatting to preserve. With those fixed, Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx> > + Should contain all of the per-channel DMA interrupts in ascending order with respect to the > + DMA channel index.
