Hi Peter, On Fri, Jan 24, 2020 at 09:38:50AM +0200, Peter Ujfalusi wrote: > On 24/01/2020 9.20, Peter Ujfalusi wrote: > > On 23/01/2020 14.23, Laurent Pinchart wrote: > >>>>> I think capture (camera) is another potential beneficiary of this. > >> > >> Possibly, although in the camera case I'd rather have the hardware stop > >> if there's no more buffer. Requiring a buffer to always be present is > >> annoying from a userspace point of view. For display it's different, if > >> userspace doesn't submit a new frame, the same frame should keep being > >> displayed on the screen. > >> > >>>>> So you don't need to terminate the running interleaved_cyclic and start > >>>>> a new one, but prepare and issue a new one, which would > >>>>> terminate/replace the currently running cyclic interleaved DMA? > >> > >> Correct. > >> > >>>> Why not explicitly terminate the transfer and start when a new one is > >>>> issued. That can be common usage for audio and display.. > >>> > >>> Yes, this is what I'm asking. The cyclic transfer is running and in > >>> order to start the new transfer, the previous should stop. But in cyclic > >>> case it is not going to happen unless it is terminated. > >>> > >>> When one would want to have different interleaved transfer the display > >>> (or capture )IP needs to be reconfigured as well. The the would need to > >>> be terminated anyways to avoid interpreting data in a wrong way. > >> > >> The use case here is not to switch to a new configuration, but to switch > >> to a new buffer. If the transfer had to be terminated manually first, > >> the DMA engine would potentially miss a frame, which is not acceptable. > >> We need an atomic way to switch to the next transfer. > > > > You have a special hardware in hand, most DMAs can not just replace a > > cyclic transfer in-flight and it also kind of violates the DMAengine > > principles. > > Is there any specific reason why you need DMAengine driver for a display > DMA? Usually the drm drivers handle their DMA internally. Because it's a separate IP core that can be reused in different FPGAs for different purposes. It happens that in my case it's a hard IP connected to a display controller, but it could be used for non-cyclic use cases in a different chip. > > If cyclic transfer is started then it is expected to run forever until > > it is terminated. Preparing and issuing a new transfer will not get > > executed when there is already a cyclic transfer in flight as your only > > option is to terminate_all, which will kill the running cyclic _and_ > > will discard the issued and pending transfers. > > > > So the use case is page flip when you have multiple framebuffers and you > > switch them to show the updated one, right? > > > > There are things missing in DMAengine in API level for sure to do this, > > imho. > > The issue is that cyclic transfers will never complete, they run until > > terminated, but you want to replace the currently executing one with a > > another cyclic transfer without actually terminating the other. > > > > It is like pause the 1st cyclic and continue with the 2nd one. Then at > > some point you pause the 2nd one and restart the 1st one. > > It is also crucial that the pause /switch happens when the executing one > > finished the interleaved round and not in the middle somewhere, right? > > > > If you: > > desc_1 = dmaengine_prep_interleaved_cyclic(chan, ); > > cookie_1 = dmaengine_submit(desc_1); > > desc_2 = dmaengine_prep_interleaved_cyclic(chan, ); > > cookie_2 = dmaengine_submit(desc_1); > > > > /* cookie_1/desc_1 is started */ > > dma_async_issue_pending(chan); > > > > /* When need to switch to cookie_2 */ > > dmaengine_cyclic_set_active_cookie(chan, cookie_2); > > /* > > * cookie_1 execution is suspended after it finished the running > > * dma_interleaved_template or buffer in normal cyclic and cookie_2 > > * is replacing it. > > */ > > > > /* Switch back to cookie_1 */ > > dmaengine_cyclic_set_active_cookie(chan, cookie_1); > > /* > > * cookie_2 execution is suspended after it finished the running > > * dma_interleaved_template or buffer in normal cyclic and cookie_1 > > * is replacing it. > > */ > > > > There should be a (yet another) capabilities flag got > > cyclic_set_active_cookie and the documentation should be strict on what > > is the expected behavior. > > > > You can kill everything with terminate_all. > > There is another thing which is missing imho from DMAengine: to > > terminate a specific cookie, not the entire channel, which might be a > > good addition as you might spawn framebuffers and then delete them and > > you might want to release the corresponding cookie/descriptor as well. > > This is a bit trickier as DMAengine's cookie is s32 and internally > treated as a running number and cookie status is checked against s32 > numbers with < >, I think this will not like when someone kills a cookie > in the middle. I would require a major redesign, yes. Not looking forward to that, especially as I think we don't need it. > > What do you think? -- Regards, Laurent Pinchart
