Hello,
On Thu, Jan 23, 2020 at 10:51:42AM +0200, Peter Ujfalusi wrote:
> On 23/01/2020 10.43, Vinod Koul wrote:
> > On 23-01-20, 10:03, Peter Ujfalusi wrote:
> >> On 23/01/2020 4.29, Laurent Pinchart wrote:
> >>> The new interleaved cyclic transaction type combines interleaved and
> >>> cycle transactions. It is designed for DMA engines that back display
> >>> controllers, where the same 2D frame needs to be output to the display
> >>> until a new frame is available.
> >>>
> >>> Suggested-by: Vinod Koul <vkoul@xxxxxxxxxx>
> >>> Signed-off-by: Laurent Pinchart <laurent.pinchart@xxxxxxxxxxxxxxxx>
> >>> ---
> >>> drivers/dma/dmaengine.c | 8 +++++++-
> >>> include/linux/dmaengine.h | 18 ++++++++++++++++++
> >>> 2 files changed, 25 insertions(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
> >>> index 03ac4b96117c..4ffb98a47f31 100644
> >>> --- a/drivers/dma/dmaengine.c
> >>> +++ b/drivers/dma/dmaengine.c
> >>> @@ -981,7 +981,13 @@ int dma_async_device_register(struct dma_device *device)
> >>> "DMA_INTERLEAVE");
> >>> return -EIO;
> >>> }
> >>> -
> >>> + if (dma_has_cap(DMA_INTERLEAVE_CYCLIC, device->cap_mask) &&
> >>> + !device->device_prep_interleaved_cyclic) {
> >>> + dev_err(device->dev,
> >>> + "Device claims capability %s, but op is not defined\n",
> >>> + "DMA_INTERLEAVE_CYCLIC");
> >>> + return -EIO;
> >>> + }
> >>>
> >>> if (!device->device_tx_status) {
> >>> dev_err(device->dev, "Device tx_status is not defined\n");
> >>> diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> >>> index 8fcdee1c0cf9..e9af3bf835cb 100644
> >>> --- a/include/linux/dmaengine.h
> >>> +++ b/include/linux/dmaengine.h
> >>> @@ -61,6 +61,7 @@ enum dma_transaction_type {
> >>> DMA_SLAVE,
> >>> DMA_CYCLIC,
> >>> DMA_INTERLEAVE,
> >>> + DMA_INTERLEAVE_CYCLIC,
> >>> /* last transaction type for creation of the capabilities mask */
> >>> DMA_TX_TYPE_END,
> >>> };
> >>> @@ -701,6 +702,10 @@ struct dma_filter {
> >>> * The function takes a buffer of size buf_len. The callback function will
> >>> * be called after period_len bytes have been transferred.
> >>> * @device_prep_interleaved_dma: Transfer expression in a generic way.
> >>> + * @device_prep_interleaved_cyclic: prepares an interleaved cyclic transfer.
> >>> + * This is similar to @device_prep_interleaved_dma, but the transfer is
> >>> + * repeated until a new transfer is issued. This transfer type is meant
> >>> + * for display.
> >>
> >> I think capture (camera) is another potential beneficiary of this.
Possibly, although in the camera case I'd rather have the hardware stop
if there's no more buffer. Requiring a buffer to always be present is
annoying from a userspace point of view. For display it's different, if
userspace doesn't submit a new frame, the same frame should keep being
displayed on the screen.
> >> So you don't need to terminate the running interleaved_cyclic and start
> >> a new one, but prepare and issue a new one, which would
> >> terminate/replace the currently running cyclic interleaved DMA?
Correct.
> > Why not explicitly terminate the transfer and start when a new one is
> > issued. That can be common usage for audio and display..
>
> Yes, this is what I'm asking. The cyclic transfer is running and in
> order to start the new transfer, the previous should stop. But in cyclic
> case it is not going to happen unless it is terminated.
>
> When one would want to have different interleaved transfer the display
> (or capture )IP needs to be reconfigured as well. The the would need to
> be terminated anyways to avoid interpreting data in a wrong way.
The use case here is not to switch to a new configuration, but to switch
to a new buffer. If the transfer had to be terminated manually first,
the DMA engine would potentially miss a frame, which is not acceptable.
We need an atomic way to switch to the next transfer.
--
Regards,
Laurent Pinchart
