Re: [PATCH v3 6/8] dmaengine: dw: introduce register mappings for iDMA 32-bit

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On Fri, 2017-01-13 at 18:03 +0530, Vinod Koul wrote:
> On Wed, Jan 11, 2017 at 05:18:10PM +0200, Andy Shevchenko wrote:

> > 
+/* Bitfields in CTL_HI */
> > +#define IDMA32C_CTLH_BLOCK_TS_MASK	GENMASK(16, 0)
> > +#define IDMA32C_CTLH_BLOCK_TS(x)	((x) &
> > IDMA32C_CTLH_BLOCK_TS_MASK)
> > +#define IDMA32C_CTLH_DONE		(1 << 17)
> > +#define IDMA32C_CTLH_CH_WEIGHT_MASK	GENMASK(28, 18)	/
> > * weight mask */
> > +#define IDMA32C_CTLH_CH_WEIGHT(x)	((x) << 18)	/*
> > weight */
> > +#define IDMA32C_CTLH_CH_CLASS_MASK	GENMASK(31, 29)	/*
> > priority class mask */
> > +#define IDMA32C_CTLH_CH_CLASS(x)	((x) << 29)	/*
> > priority class */
> 
> Are we planning to support weights?

Not in nearest future. Would you like me to remove those definitions?


-- 
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy
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