On 03.11.2016 14:22, Koul, Vinod wrote:
On Wed, 2016-10-26 at 12:15 +0200, Stefan Roese wrote:
AFAICT, we don't need any request lines for my type of "memory-to-
memory" transfers. Such request lines should only be needed for
"synchronous device transfers", where the device requests new data
(e.g. FIFO empty or ready...). Or am I missing something here?
You are right saying about the request lines for "this" case. The FPGA
should be treated as a memory window
Could you perhaps ask a bit around about this potential limitation?
This is very important to us and any information about this would
be very helpful and really appreciated.
Yes I did ask and looks like dma controller cannot access all memory
range of the system. So there are limitations on this.
Thanks for this clarification.
Can you tell me where you purchased this board from? Did it come from
Intel or other third party?
Its a third party board. We are currently testing on the DFI BT700
BayTrail QSeven SoM [1]. Using a custom baseboard where the FPGA is
connected to the PCIe bus.
Thanks,
Stefan
[1] http://www.dfi.com.tw/products/product.html?productId=1585
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