On Fri, 7 Feb 2025 16:09:14 +0200 Antoniu Miclaus <antoniu.miclaus@xxxxxxxxxx> wrote: > Add a new compatible and related bindings for the fpga-based > AD485x AXI IP core, a variant of the generic AXI ADC IP. > > The AXI AD485x IP is a very similar HDL (fpga) variant of the > generic AXI ADC IP, intended to control ad485x familiy. Hmm. Should we name this after a specific part? Very unlikely the wildcard will go wrong here because of how specific this binding is anyway but we should perhaps stick to normal rules of no wild cards. > > Signed-off-by: Antoniu Miclaus <antoniu.miclaus@xxxxxxxxxx> > --- > Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml > index e1f450b80db2..f1b470f74069 100644 > --- a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml > +++ b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml > @@ -19,11 +19,13 @@ description: | > memory via DMA. > > https://wiki.analog.com/resources/fpga/docs/axi_adc_ip > + https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html > > properties: > compatible: > enum: > - adi,axi-adc-10.0.a > + - adi,axi-ad485x > > reg: > maxItems: 1
