On Sat, 2025-01-18 at 09:37 +0100, Krzysztof Kozlowski wrote: > //snip > I did not talk about driver. I talked about this patch. Look at patch > title - it starts with dt-bindings. Is here anything about driver? > No. > Why do we talk about driver? > > > differently from typical DMA drivers, and therefore we believe that > > the > > EXDMA driver may not be suitable to be placed under the > > driver/mediatek/drm directory. The main reasons are as follows: > > > > (1)No Memory Allocation within EXDMA Engine: > > The EXDMA engine does not perform memory allocation operations > > itself. > > Instead, it relies on GEM (Graphics Execution Manager) to allocate > > memory.Traditional DMA drivers often handle their own memory > > allocations, but in the case of EXDMA, memory management is > > delegated > > to GEM. > > > > (2)Primary Task of EXDMA: > > The main function of EXDMA is to transfer buffers allocated by GEM > > to > > the subsequent display pipeline. > > EXDMA serves as a bridge between memory allocated by GEM and the > > display components, rather than acting as a general-purpose DMA > > engine. > > Based on the points above, we have decided to place the EXDMA > > driver > > under the DRM display subsystem rather than under the DMA > > subsystem. > > > I don't care if it uses GEM or kernel allocator or even 3rd party > allocator. The question is: what is this device? If it is performing > DMA, then it should be placed in "dma" directory. The rdma was placed > differently but as you can easily check: it was never acked/reviewed, > so > don't use it as an example. > > Of course if it does not perform DMA, then it should not be in dma, > but > then I don't agree on using dma-cells here and anything like that in > the > driver. > > Best regards, > Krzysztof > Hi Krzysztof, The current placement of EXDMA under the display subsystem in Mediatek's architecture is primarily due to its functional role as a sub-device within the display pipeline. In MT8196 hardware design, the sub-devices in display pipeline follow a sequence of: EXDMA -> BLENDER -> OUTPROC -> PQ -> DVO. In MT8195 hardware design, the sub-devices in display pipeline follow a sequence of: OVL -> PQ ->DSI. As we see, OVL has been divided into three new hardware IPs in MT8196. OVL and EXDMA both have the ability to fetch data directly from DRAM and can be regarded as DMA controller. I also have confirmed with the hardware designer that EXDMA is a kind of DMA, but it is specially designed to handle the graphical layer, and has better performance than ordinary DMA. Therefore, I think that moving EXDMA and OVL from the display folder to the DMA folder, or only kepping them in the display folder is decided by the two different views of DMA ability or display sub-device. We will follow your instructions to put EXDMA on the place you decided. Best regards, Paul Chen
