From: "Paul-pl.Chen" <paul-pl.chen@xxxxxxxxxxxx> Add mediatek,exdma.yaml to support EXDMA for MT8196. Signed-off-by: Paul-pl.Chen <paul-pl.chen@xxxxxxxxxxxx> --- The header used in examples: #include <dt-bindings/clock/mt8196-clk.h> #include <dt-bindings/power/mt8196-power.h> are not upstreamed yet. It will be sent by related owner soon. --- .../display/mediatek/mediatek,exdma.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.yaml diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.yaml new file mode 100644 index 000000000000..385f5549dfaa --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,exdma.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,exdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek EXDMA + +maintainers: + - Chun-Kuang Hu <chunkuang.hu@xxxxxxxxxx> + - Philipp Zabel <p.zabel@xxxxxxxxxxxxxx> + +description: + The MediaTek display overlap extended DMA engine, namely OVL_EXDMA or EXDMA, + primarily functions as a DMA engine for reading data from DRAM with various + DRAM footprints and data formats. For input sources in certain color formats + and color domains, OVL_EXDMA also includes a color transfer function + to process pixels into a consistent color domain. + +properties: + compatible: + const: mediatek,mt8196-exdma + + reg: + maxItems: 1 + + clocks: + items: + - description: EXDMA Clock + + power-domains: + maxItems: 1 + + mediatek,larb: + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + items: + maxItems: 1 + description: | + A phandle to the local arbiters node in the current SoCs. + Refer to bindings/memory-controllers/mediatek,smi-larb.yaml. + + iommus: + maxItems: 1 + + '#dma-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - power-domains + - mediatek,larb + - iommus + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/mt8196-clk.h> + #include <dt-bindings/power/mt8196-power.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + disp_ovl0_exdma2: dma-controller@32850000 { + compatible = "mediatek,mt8196-exdma"; + reg = <0 0x32850000 0 0x1000>; + clocks = <&ovlsys_config_clk CLK_OVL_EXDMA2_DISP>; + power-domains = <&hfrpsys MT8196_POWER_DOMAIN_OVL0_DORMANT>; + mediatek,larb = <&smi_larb0>; + iommus = <&mm_smmu 144>; + #dma-cells = <1>; + }; + }; -- 2.34.1
