On Sun, Jan 12, 2025 at 01:55:05AM +0100, Alexander Sverdlin wrote: > Add initial device tree for the SG2000 SoC by SOPHGO (from ARM64 PoV). > > --- > Dear ARM, RISCV, DT maintainers, I'd like to ask your opinion on the > below patch, which I plan as a base for ARM64 BSP for dual-arch (RISCV or > ARM64) Cvitek SoC SG2000. The main motivation for ARM64 support is the > ARCH support in the upstream gcc, which is not that mature for RISCV. > > I believe it's the first time we already have quite some base in the > tree for a SoC, so it would be advantageous to re-use it and not > duplicate the same SoC structures in two places, especially having > in mind that Cvitek/Sophgo are still working on upstreaming and by > far not all HW blocks are populated in the SoC DTs. They focus primarely > on RISCV, so ARM64 would be dragging behind in this case if it would be > forked. > > On the other hand, including SoC dtsi from RISCV into ARM64 poses > some technical challenges by itself, obviously CPU cores have to be > deleted, same is true for interrupt controller. And the interrupt > numbers are of course difference for ARM GIC, so they have to be > overwritten. > > Alternatively I can split existing .dtsi included below into their > RISCV-specific and generic parts, so that both ARM64 and RISCV would > include generic part and their corresponding ARCH-specific parts > bringing CPU cores + interrupt controller + IRQ numbers for each and > every device separately. > > The below example isactually booting (being included into board-level > DT), so it's a real example I'd be ready to submit if there will be > no objections of the cross-ARCH include approach in general. > > What are your thoughts? > > arch/arm64/boot/dts/sophgo/sg2000.dtsi | 164 +++++++++++++++++++++++++ > 1 file changed, 164 insertions(+) > create mode 100644 arch/arm64/boot/dts/sophgo/sg2000.dtsi > > diff --git a/arch/arm64/boot/dts/sophgo/sg2000.dtsi b/arch/arm64/boot/dts/sophgo/sg2000.dtsi > new file mode 100644 > index 000000000000..96afd342bde5 > --- /dev/null > +++ b/arch/arm64/boot/dts/sophgo/sg2000.dtsi > @@ -0,0 +1,164 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > +#include "../../../../riscv/boot/dts/sophgo/cv18xx.dtsi" > +#include "../../../../riscv/boot/dts/sophgo/cv181x.dtsi" FWIW, this can just be #include <riscv/sophgo/<whatever>, /should/ be a symlink for that, as there is for arm64. At the very least, I did see a patch adding that link in the past. Check out what the RZ/Five is doing (that's the riscv renesas chip) for an example of how this already has been done - I think it's doing what your "Alternatively I can..." paragraph describes.
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