On 03/01/2025 09:48, qin shaoqing wrote: > This patch adds the device tree support for the XiangShan platform's nanhu soc Please do not use "This commit/patch/change", but imperative mood. See longer explanation here: https://elixir.bootlin.com/linux/v5.17.1/source/Documentation/process/submitting-patches.rst#L95 Please wrap commit message according to Linux coding style / submission process (neither too early nor over the limit): https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597 > > Signed-off-by: qinshaoqing <qinshaoqing@xxxxxxxxxx> > --- > arch/riscv/Kconfig.socs | 5 + > arch/riscv/boot/dts/Makefile | 1 + > arch/riscv/boot/dts/xiangshan/Makefile | 2 + > arch/riscv/boot/dts/xiangshan/nanhu-v3a.dts | 226 ++++++++++++++++++++ > 4 files changed, 234 insertions(+) > create mode 100644 arch/riscv/boot/dts/xiangshan/Makefile > create mode 100644 arch/riscv/boot/dts/xiangshan/nanhu-v3a.dts > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs > index f51bb24bc84c..89c80fd493fb 100644 > --- a/arch/riscv/Kconfig.socs > +++ b/arch/riscv/Kconfig.socs > @@ -80,4 +80,9 @@ config SOC_CANAAN_K210 > help > This enables support for Canaan Kendryte K210 SoC platform hardware. > > +config SOC_XIANGSHAN > + bool "XiangShan SoCs" > + help > + This enables support for XiangShan SoC platform hardware > + > endmenu # "SoC selection" > diff --git a/arch/riscv/boot/dts/Makefile b/arch/riscv/boot/dts/Makefile > index fdae05bbf556..43a79cc9dd7c 100644 > --- a/arch/riscv/boot/dts/Makefile > +++ b/arch/riscv/boot/dts/Makefile > @@ -7,5 +7,6 @@ subdir-y += sifive > subdir-y += sophgo > subdir-y += starfive > subdir-y += thead > +subdir-y += xiangshan > > obj-$(CONFIG_BUILTIN_DTB) := $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_SOURCE)) > diff --git a/arch/riscv/boot/dts/xiangshan/Makefile > b/arch/riscv/boot/dts/xiangshan/Makefile > new file mode 100644 > index 000000000000..41e585490a97 > --- /dev/null > +++ b/arch/riscv/boot/dts/xiangshan/Makefile > @@ -0,0 +1,2 @@ > +# SPDX-License-Identifier: GPL-2.0 > +dtb-$(CONFIG_SOC_XIANGSHAN) += nanhu-v3a.dtb > diff --git a/arch/riscv/boot/dts/xiangshan/nanhu-v3a.dts > b/arch/riscv/boot/dts/xiangshan/nanhu-v3a.dts > new file mode 100644 > index 000000000000..560de7c7f22e > --- /dev/null > +++ b/arch/riscv/boot/dts/xiangshan/nanhu-v3a.dts > @@ -0,0 +1,226 @@ > +// SPDX-License-Identifier: (GPL-2.0 OR MIT) > +/* Copyright (c) 2023-2024 BOSC */ > + > +/dts-v1/; > + > +/ { > + #address-cells = <2>; > + #size-cells = <2>; > + compatible = "bosc,nanhu-v3a"; Please run scripts/checkpatch.pl and fix reported warnings. After that, run also `scripts/checkpatch.pl --strict` and (probably) fix more warnings. Some warnings can be ignored, especially from --strict run, but the code here looks like it needs a fix. Feel free to get in touch if the warning is not clear. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Maybe you need to update your dtschema and yamllint. Don't rely on distro packages for dtschema and be sure you are using the latest released dtschema. > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + timebase-frequency = <24000000>; Your patch is corrupted or code is just wrong style. Impossible to review. Please follow DTS and kernel coding style documents. Best regards, Krzysztof
