On Thu, Dec 12, 2024 at 05:35:55PM +0800, Jacky Bai wrote:
> The i.MX 943 applications processors integrate up to four
> Arm Cortex A55 cores and supports functional safety with
> built-in 2x Arm Cortex M33 and M7 cores which can be
> configured asa safety island. Optimizing performance and
> power efficiency for Industrial, IoT and automotive devices,
> i.MX 943 processors are built with NXP’s innovative Energy
> Flex architecture.
>
> This patch adds the minimal dtsi support for i.MX943 with
> peripherals like uart, edma, i2c, spi, mu, sai etc.
>
> Signed-off-by: Jacky Bai <ping.bai@xxxxxxx>
> ---
> arch/arm64/boot/dts/freescale/imx943-clock.h | 196 +++
> .../arm64/boot/dts/freescale/imx943-pinfunc.h | 1542 +++++++++++++++++
> arch/arm64/boot/dts/freescale/imx943-power.h | 41 +
> arch/arm64/boot/dts/freescale/imx943.dtsi | 1284 ++++++++++++++
No, this is untested, uncompilable.
We do not add dead code to the kernel. You need users.
> 4 files changed, 3063 insertions(+)
> create mode 100644 arch/arm64/boot/dts/freescale/imx943-clock.h
> create mode 100644 arch/arm64/boot/dts/freescale/imx943-pinfunc.h
> create mode 100644 arch/arm64/boot/dts/freescale/imx943-power.h
> create mode 100644 arch/arm64/boot/dts/freescale/imx943.dtsi
>
> diff --git a/arch/arm64/boot/dts/freescale/imx943-clock.h b/arch/arm64/boot/dts/freescale/imx943-clock.h
> new file mode 100644
> index 000000000000..64b9d5d4051e
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/imx943-clock.h
> @@ -0,0 +1,196 @@
> +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
> +/*
> + * Copyright 2024 NXP
> + */
> +
> +#ifndef __CLOCK_IMX943_H
> +#define __CLOCK_IMX943_H
> +
> +#define IMX943_CLK_EXT 0
> +#define IMX943_CLK_OSC32K 1
> +#define IMX943_CLK_OSC24M 2
> +#define IMX943_CLK_FRO 3
> +#define IMX943_CLK_SYSPLL1_VCO 4
> +#define IMX943_CLK_SYSPLL1_PFD0_UNGATED 5
> +#define IMX943_CLK_SYSPLL1_PFD0 6
> +#define IMX943_CLK_SYSPLL1_PFD0_DIV2 7
> +#define IMX943_CLK_SYSPLL1_PFD1_UNGATED 8
> +#define IMX943_CLK_SYSPLL1_PFD1 9
> +#define IMX943_CLK_SYSPLL1_PFD1_DIV2 10
> +#define IMX943_CLK_SYSPLL1_PFD2_UNGATED 11
> +#define IMX943_CLK_SYSPLL1_PFD2 12
> +#define IMX943_CLK_SYSPLL1_PFD2_DIV2 13
> +#define IMX943_CLK_AUDIOPLL1_VCO 14
> +#define IMX943_CLK_AUDIOPLL1 15
> +#define IMX943_CLK_AUDIOPLL2_VCO 16
> +#define IMX943_CLK_AUDIOPLL2 17
> +#define IMX943_CLK_RESERVED18 18
> +#define IMX943_CLK_RESERVED19 19
> +#define IMX943_CLK_RESERVED20 20
> +#define IMX943_CLK_RESERVED21 21
> +#define IMX943_CLK_RESERVED22 22
> +#define IMX943_CLK_RESERVED23 23
> +#define IMX943_CLK_ENCPLL_VCO 24
> +#define IMX943_CLK_ENCPLL_PFD0_UGATED 25
> +#define IMX943_CLK_ENCPLL_PFD0 26
> +#define IMX943_CLK_ENCPLL_PFD1_UGATED 27
> +#define IMX943_CLK_ENCPLL_PFD1 28
> +#define IMX943_CLK_ARMPLL_VCO 29
> +#define IMX943_CLK_ARMPLL_PFD0_UNGATED 30
> +#define IMX943_CLK_ARMPLL_PFD0 31
> +#define IMX943_CLK_ARMPLL_PFD1_UNGATED 32
> +#define IMX943_CLK_ARMPLL_PFD1 33
> +#define IMX943_CLK_ARMPLL_PFD2_UNGATED 34
> +#define IMX943_CLK_ARMPLL_PFD2 35
> +#define IMX943_CLK_ARMPLL_PFD3_UNGATED 36
> +#define IMX943_CLK_ARMPLL_PFD3 37
> +#define IMX943_CLK_DRAMPLL_VCO 38
> +#define IMX943_CLK_DRAMPLL 39
> +#define IMX943_CLK_HSIOPLL_VCO 40
> +#define IMX943_CLK_HSIOPLL 41
> +#define IMX943_CLK_LDBPLL_VCO 42
> +#define IMX943_CLK_LDBPLL 43
> +#define IMX943_CLK_EXT1 44
> +#define IMX943_CLK_EXT2 45
> +
> +#define IMX943_CLK_NUM_SRC 46
Drop and all other clock numbers like that.
...
> +#include <dt-bindings/dma/fsl-edma.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +#include "imx943-clock.h"
> +#include "imx943-pinfunc.h"
> +#include "imx943-power.h"
> +
> +/ {
> + interrupt-parent = <&gic>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + idle-states {
> + entry-method = "psci";
> +
> + cpu_pd_wait: cpu-pd-wait {
> + compatible = "arm,idle-state";
> + arm,psci-suspend-param = <0x0010033>;
> + local-timer-stop;
> + entry-latency-us = <10000>;
> + exit-latency-us = <7000>;
> + min-residency-us = <27000>;
> + wakeup-latency-us = <15000>;
> + };
> + };
> +
> + A55_0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + reg = <0x0>;
> + enable-method = "psci";
> + #cooling-cells = <2>;
> + cpu-idle-states = <&cpu_pd_wait>;
> + power-domains = <&scmi_perf IMX943_PERF_A55>;
> + power-domain-names = "perf";
> + i-cache-size = <32768>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&l2_cache_l0>;
> + };
> +
> + A55_1: cpu@100 {
labels are always lowercase.
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + reg = <0x100>;
> + enable-method = "psci";
> + #cooling-cells = <2>;
> + cpu-idle-states = <&cpu_pd_wait>;
> + power-domains = <&scmi_perf IMX943_PERF_A55>;
> + power-domain-names = "perf";
> + i-cache-size = <32768>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&l2_cache_l1>;
> + };
> +
> + A55_2: cpu@200 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + reg = <0x200>;
> + enable-method = "psci";
> + #cooling-cells = <2>;
> + cpu-idle-states = <&cpu_pd_wait>;
> + power-domains = <&scmi_perf IMX943_PERF_A55>;
> + power-domain-names = "perf";
> + i-cache-size = <32768>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&l2_cache_l2>;
> + };
> +
> + A55_3: cpu@300 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a55";
> + reg = <0x300>;
> + enable-method = "psci";
> + #cooling-cells = <2>;
> + cpu-idle-states = <&cpu_pd_wait>;
> + power-domains = <&scmi_perf IMX943_PERF_A55>;
> + power-domain-names = "perf";
> + i-cache-size = <32768>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <128>;
> + d-cache-size = <32768>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + next-level-cache = <&l2_cache_l3>;
> + };
> +
> + l2_cache_l0: l2-cache-l0 {
> + compatible = "cache";
> + cache-size = <65536>;
> + cache-line-size = <64>;
> + cache-sets = <256>;
> + cache-level = <2>;
> + cache-unified;
> + next-level-cache = <&l3_cache>;
> + };
> +
> + l2_cache_l1: l2-cache-l1 {
> + compatible = "cache";
> + cache-size = <65536>;
> + cache-line-size = <64>;
> + cache-sets = <256>;
> + cache-level = <2>;
> + cache-unified;
> + next-level-cache = <&l3_cache>;
> + };
> +
> + l2_cache_l2: l2-cache-l2 {
> + compatible = "cache";
> + cache-size = <65536>;
> + cache-line-size = <64>;
> + cache-sets = <256>;
> + cache-level = <2>;
> + cache-unified;
> + next-level-cache = <&l3_cache>;
> + };
> +
> + l2_cache_l3: l2-cache-l3 {
> + compatible = "cache";
> + cache-size = <65536>;
> + cache-line-size = <64>;
> + cache-sets = <256>;
> + cache-level = <2>;
> + cache-unified;
> + next-level-cache = <&l3_cache>;
> + };
> +
> + l3_cache: l3-cache {
> + compatible = "cache";
> + cache-size = <1048576>;
> + cache-line-size = <64>;
> + cache-sets = <1024>;
> + cache-level = <3>;
> + cache-unified;
> + };
> + };
> +
> + clk_ext1: clock-ext1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <133000000>;
> + clock-output-names = "clk_ext1";
> + };
> +
> + dummy: clk-dummy {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "dummy";
> + };
> +
> + osc_24m: clock-24m {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <24000000>;
> + clock-output-names = "osc_24m";
> + };
> +
> + sai1_mclk: clock-sai1-mclk1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "sai1_mclk";
> + };
> +
> + sai2_mclk: clock-sai2-mclk1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "sai2_mclk";
> + };
> +
> + sai3_mclk: clock-sai3-mclk1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "sai3_mclk";
> + };
> +
> + sai4_mclk: clock-sai4-mclk1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <0>;
> + clock-output-names = "sai4_mclk";
> + };
> +
> + firmware {
> + scmi {
> + compatible = "arm,scmi";
> + mboxes = <&mu2 5 0>, <&mu2 3 0>, <&mu2 3 1>, <&mu2 5 1>;
> + shmem = <&scmi_buf0>, <&scmi_buf1>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + arm,max-rx-timeout-ms = <5000>;
> +
> + scmi_devpd: protocol@11 {
> + reg = <0x11>;
> + #power-domain-cells = <1>;
> + };
> +
> + scmi_sys_power: protocol@12 {
> + reg = <0x12>;
> + };
> +
> + scmi_perf: protocol@13 {
> + reg = <0x13>;
> + #power-domain-cells = <1>;
> + };
> +
> + scmi_clk: protocol@14 {
> + reg = <0x14>;
> + #clock-cells = <1>;
> + };
> +
> + scmi_iomuxc: protocol@19 {
> + reg = <0x19>;
> + };
> +
> + scmi_bbm: protocol@81 {
> + reg = <0x81>;
> + };
> + };
> + };
> +
> + pmu {
> + compatible = "arm,cortex-a55-pmu";
> + interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
> + };
> +
> + psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> + };
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
> + clock-frequency = <24000000>;
> + arm,no-tick-in-suspend;
> + interrupt-parent = <&gic>;
> + };
> +
> + gic: interrupt-controller@48000000 {
> + compatible = "arm,gic-v3";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + reg = <0 0x48000000 0 0x10000>,
> + <0 0x48060000 0 0xc0000>;
> + #interrupt-cells = <3>;
> + interrupt-controller;
> + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-parent = <&gic>;
> + dma-noncoherent;
> + ranges;
> +
> + its: msi-controller@48040000 {
> + compatible = "arm,gic-v3-its";
> + reg = <0 0x48040000 0 0x20000>;
> + msi-controller;
> + #msi-cells = <1>;
> + dma-noncoherent;
> + };
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + aips2: bus@42000000 {
> + compatible = "fsl,aips-bus", "simple-bus";
> + reg = <0x0 0x42000000 0x0 0x800000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x42000000 0x0 0x42000000 0x8000000>;
> +
> + edma2: dma-controller@42000000 {
> + compatible = "fsl,imx95-edma5";
imx943 or imx95?
Best regards,
Krzysztof
