On 27 November 2024 21:22:02 EET, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote: >On 27/11/2024 19:49, Dmitry Baryshkov wrote: >> On 27 November 2024 20:27:27 EET, Krzysztof Kozlowski <krzk@xxxxxxxxxx> wrote: >>> On 27/11/2024 17:53, Dmitry Baryshkov wrote: >>>> On Wed, Nov 27, 2024 at 08:23:04AM -0600, Rob Herring wrote: >>>>> On Mon, Nov 25, 2024 at 05:45:10PM +0000, Raviteja Laggyshetty wrote: >>>>>> EPSS instance on sc7280, sm8250 SoCs, use PERF_STATE register instead of >>>>>> REG_L3_VOTE to scale L3 clocks, hence adding a new generic compatible >>>>>> "qcom,epss-l3-perf" for these targets. >>>>> >>>>> Is this a h/w difference from prior blocks or you just want to use B >>>>> instead of A while the h/w has both A and B? The latter sounds like >>>>> driver policy. >>>>> >>>>> It is also an ABI break for s/w that didn't understand >>>>> qcom,epss-l3-perf. >>>> >>>> As the bindings keep old compatible strings in addition to the new >>>> qcom,epss-l3-perf, where is the ABI break? Old SW will use old entries, >>>> newer can use either of those. >>> No, this change drops qcom,epss-l3 and adds new fallback. How old >>> software can work in such case? It's broken. >> >> Oh, I see. We had a platform-specific overrides for those two. Then I think we should completely drop the new qcom,epss-l3-perf idea and follow the sm8250 / sc7280 example. This means compatible = "qcom,sa8775p-perf", "qcom,epss-l3". > >It depends for example whether epss-l3 is valid at all. ABI is not >broken if nothing was working in the first place, assuming it is >explained in commit msg (not the case here). Judging by the current schema, epss-l3 is defined as new HW block of aka not OSM L3, no matter which register is used for programming. > >Best regards, >Krzysztof
