On Wed, Nov 27, 2024 at 08:23:04AM -0600, Rob Herring wrote: > On Mon, Nov 25, 2024 at 05:45:10PM +0000, Raviteja Laggyshetty wrote: > > EPSS instance on sc7280, sm8250 SoCs, use PERF_STATE register instead of > > REG_L3_VOTE to scale L3 clocks, hence adding a new generic compatible > > "qcom,epss-l3-perf" for these targets. > > Is this a h/w difference from prior blocks or you just want to use B > instead of A while the h/w has both A and B? The latter sounds like > driver policy. > > It is also an ABI break for s/w that didn't understand > qcom,epss-l3-perf. As the bindings keep old compatible strings in addition to the new qcom,epss-l3-perf, where is the ABI break? Old SW will use old entries, newer can use either of those. > > > > > Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx> > > --- > > .../devicetree/bindings/interconnect/qcom,osm-l3.yaml | 7 +++++-- > > 1 file changed, 5 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > > index 21dae0b92819..e24399ca110f 100644 > > --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > > +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml > > @@ -28,12 +28,15 @@ properties: > > - const: qcom,osm-l3 > > - items: > > - enum: > > - - qcom,sc7280-epss-l3 > > - qcom,sc8280xp-epss-l3 > > - qcom,sm6375-cpucp-l3 > > - - qcom,sm8250-epss-l3 > > - qcom,sm8350-epss-l3 > > - const: qcom,epss-l3 > > + - items: > > + - enum: > > + - qcom,sc7280-epss-l3 > > + - qcom,sm8250-epss-l3 > > + - const: qcom,epss-l3-perf > > > > reg: > > maxItems: 1 > > -- > > 2.39.2 > > -- With best wishes Dmitry
