Hi Frank,
Am Donnerstag, 7. November 2024, 16:06:26 CET schrieb Frank Li:
> On Thu, Nov 07, 2024 at 06:27:02PM -0800, Pengfei Li wrote:
> > The i.MX 91 family features an Arm Cortex-A55 running at up to
> > 1.4GHz, support for modern LPDDR4 memory to enable platform longevity,
> > along with a rich set of peripherals targeting medical, industrial
> > and consumer IoT market segments.
> >
> > The design of the i.MX91 platform is very similar to i.MX93.
> > The mainly difference between i.MX91 and i.MX93 is as follows:
> > - i.MX91 removed some clocks and modified the names of some clocks.
> > - i.MX91 only has one A core
>
> - pinmux change
>
> >
> > Signed-off-by: Pengfei Li <pengfei.li_1@xxxxxxx>
> > Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
> > ---
> > arch/arm64/boot/dts/freescale/imx91-pinfunc.h | 770 ++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx91.dtsi | 66 ++
> > 2 files changed, 836 insertions(+)
> > create mode 100644 arch/arm64/boot/dts/freescale/imx91-pinfunc.h
> > create mode 100644 arch/arm64/boot/dts/freescale/imx91.dtsi
> >
> [snip]
> > diff --git a/arch/arm64/boot/dts/freescale/imx91.dtsi b/arch/arm64/boot/dts/freescale/imx91.dtsi
> > new file mode 100644
> > index 000000000000..a9f4c1fe61cc
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx91.dtsi
> > @@ -0,0 +1,66 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2024 NXP
> > + */
> > +
> > +#include "imx91-pinfunc.h"
> > +#include "imx93.dtsi"
> > +
> > +&{/thermal-zones/cpu-thermal/cooling-maps/map0} {
> > + cooling-device =
> > + <&A55_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +};
> > +
> > +&clk {
> > + compatible = "fsl,imx91-ccm";
> > +};
> > +
> > +&eqos {
> > + clocks = <&clk IMX91_CLK_ENET1_QOS_TSN_GATE>,
> > + <&clk IMX91_CLK_ENET1_QOS_TSN_GATE>,
> > + <&clk IMX91_CLK_ENET_TIMER>,
> > + <&clk IMX91_CLK_ENET1_QOS_TSN>,
> > + <&clk IMX91_CLK_ENET1_QOS_TSN_GATE>;
> > + assigned-clocks = <&clk IMX91_CLK_ENET_TIMER>,
> > + <&clk IMX91_CLK_ENET1_QOS_TSN>;
> > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
> > + <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
> > +};
> > +
> > +&fec {
> > + clocks = <&clk IMX91_CLK_ENET2_REGULAR_GATE>,
> > + <&clk IMX91_CLK_ENET2_REGULAR_GATE>,
> > + <&clk IMX91_CLK_ENET_TIMER>,
> > + <&clk IMX91_CLK_ENET2_REGULAR>,
> > + <&clk IMX93_CLK_DUMMY>;
> > + assigned-clocks = <&clk IMX91_CLK_ENET_TIMER>,
> > + <&clk IMX91_CLK_ENET2_REGULAR>;
> > + assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
> > + <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
> > + assigned-clock-rates = <100000000>, <250000000>;
> > +};
> > +
> > +&i3c1 {
> > + clocks = <&clk IMX93_CLK_BUS_AON>,
> > + <&clk IMX93_CLK_I3C1_GATE>,
> > + <&clk IMX93_CLK_DUMMY>;
> > +};
> > +
> > +&i3c2 {
> > + clocks = <&clk IMX93_CLK_BUS_WAKEUP>,
> > + <&clk IMX93_CLK_I3C2_GATE>,
> > + <&clk IMX93_CLK_DUMMY>;
> > +};
> > +
> > +&tmu {
> > + status = "disabled";
> > +};
> > +
> > +/* i.MX91 only has one A core */
> > +/delete-node/ &A55_1;
> > +
> > +/* i.MX91 not has cm33 */
> > +/delete-node/ &cm33;
> > +
> > +/* i.MX91 not has power-domain@44461800 */
> > +/delete-node/ &mlmix;
>
> If someone want to use it in overlay file, /delete-node/ will not work.
Do you expect someone including this SoC-dtsi in an overlay?
I personally don't, well I'll welcome other comments.
As imx93 is an upgrade to imx91, there is also the possibility to do it
the other way around, similar to imx7s and imx7d. The latter one including
imx7.dtsi and adding additionally peripherals.
Best regards
Alexander
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