On 04/10/2024 12:23, Sricharan R wrote: > maintainers: > - Bjorn Andersson <andersson@xxxxxxxxxx> > > description: | > Qualcomm global clock control module provides the clocks, resets and power > - domains on IPQ5332. > + domains on IPQ5332 and IPQ5424. > > - See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h > - > -allOf: > - - $ref: qcom,gcc.yaml# > + See also:: s/::/:/ > + include/dt-bindings/clock/qcom,gcc-ipq5332.h > + include/dt-bindings/clock/qcom,gcc-ipq5424.h > > properties: > compatible: > - const: qcom,ipq5332-gcc > + enum: > + - qcom,ipq5332-gcc > + - qcom,ipq5424-gcc > > clocks: > + minItems: 5 > items: > - description: Board XO clock source > - description: Sleep clock source > - description: PCIE 2lane PHY pipe clock source > - description: PCIE 2lane x1 PHY pipe clock source (For second lane) > + - description: PCIE 2-lane PHY2 pipe clock source > + - description: PCIE 2-lane PHY3 pipe clock source > - description: USB PCIE wrapper pipe clock source Why do you change fifth clock on ipq5332? Please test your patches - change DTS for ipq5332 and provide PCIE 2-lane PHY2 there. Best regards, Krzysztof
