Re: [PATCH V3 2/7] dt-bindings: clock: Add Qualcomm IPQ5424 GCC binding

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On 10/5/2024 11:53 PM, Rob Herring wrote:
On Fri, Oct 04, 2024 at 03:53:37PM +0530, Sricharan R wrote:
From: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>

Add binding for the Qualcomm IPQ5424 Global Clock Controller

Signed-off-by: Sricharan Ramabadhran <quic_srichara@xxxxxxxxxxx>
---
  [V3] Added only new clocks for IPQ5424 and ordered for both
       IPQ5332 and IPQ5424 based on min/max items

  .../bindings/clock/qcom,ipq5332-gcc.yaml      |  40 ++-
  include/dt-bindings/clock/qcom,ipq5424-gcc.h  | 156 +++++++++
  include/dt-bindings/reset/qcom,ipq5424-gcc.h  | 310 ++++++++++++++++++
  3 files changed, 499 insertions(+), 7 deletions(-)
  create mode 100644 include/dt-bindings/clock/qcom,ipq5424-gcc.h
  create mode 100644 include/dt-bindings/reset/qcom,ipq5424-gcc.h

diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
index 9193de681de2..1b6d64385116 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq5332-gcc.yaml
@@ -4,30 +4,34 @@
  $id: http://devicetree.org/schemas/clock/qcom,ipq5332-gcc.yaml#
  $schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller on IPQ5332
+title: Qualcomm Global Clock & Reset Controller on IPQ5332 and IPQ5424
maintainers:
    - Bjorn Andersson <andersson@xxxxxxxxxx>
description: |
    Qualcomm global clock control module provides the clocks, resets and power
-  domains on IPQ5332.
+  domains on IPQ5332 and IPQ5424.
- See also:: include/dt-bindings/clock/qcom,gcc-ipq5332.h
-
-allOf:
-  - $ref: qcom,gcc.yaml#
+  See also::
+    include/dt-bindings/clock/qcom,gcc-ipq5332.h
+    include/dt-bindings/clock/qcom,gcc-ipq5424.h
properties:
    compatible:
-    const: qcom,ipq5332-gcc
+    enum:
+      - qcom,ipq5332-gcc
+      - qcom,ipq5424-gcc
clocks:
+    minItems: 5
      items:
        - description: Board XO clock source
        - description: Sleep clock source
        - description: PCIE 2lane PHY pipe clock source
        - description: PCIE 2lane x1 PHY pipe clock source (For second lane)
+      - description: PCIE 2-lane PHY2 pipe clock source
+      - description: PCIE 2-lane PHY3 pipe clock source
        - description: USB PCIE wrapper pipe clock source

New clocks go on the end of the list. Otherwise, it is an ABI break (or
the descriptions are wrong in one case).

ok got it. Had a similar comment from Krzysztof for this.
Will fix in V4.

Regards,
 Sricharan






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