> -----Original Message----- > From: Krzysztof Kozlowski <krzk@xxxxxxxxxx> > Sent: Monday, September 16, 2024 4:51 PM > To: Delphine_CC_Chiu/WYHQ/Wiwynn <Delphine_CC_Chiu@xxxxxxxxxx>; > patrick@xxxxxxxxx; Rob Herring <robh@xxxxxxxxxx>; Krzysztof Kozlowski > <krzk+dt@xxxxxxxxxx>; Conor Dooley <conor+dt@xxxxxxxxxx>; Joel Stanley > <joel@xxxxxxxxx>; Andrew Jeffery <andrew@xxxxxxxxxxxxxxxxxxxx> > Cc: Ricky CX Wu <ricky.cx.wu.wiwynn@xxxxxxxxx>; > devicetree@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; > linux-aspeed@xxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx > Subject: Re: [PATCH v1] ARM: dts: aspeed: yosemite4: Enable interrupt setting > for pca9555 > > [External Sender] > > [External Sender] > > On 10/09/2024 10:20, Delphine_CC_Chiu/WYHQ/Wiwynn wrote: > > I will revise in v2. Thanks! > >>> + interrupt-parent = <&gpio0>; > >>> + interrupts = <98 IRQ_TYPE_LEVEL_LOW>; > >>> + gpio-line-names = > >>> + "P48V_OCP_GPIO1","P48V_OCP_GPIO2", > >> > >> Nothing improved here. I already commented about above and this. > >> Implement feedback for all your patches, not only one. > >> > >> Best regards, > >> Krzysztof > > Sorry about that. > > I saw you say "Broken alignment" in v15 patch. > > Would like to ask if the following format meets your expectations? > > + gpio-line-names = > > + "P48V_OCP_GPIO1", > "P48V_OCP_GPIO2", > > + "P48V_OCP_GPIO3", > > + "FAN_BOARD_0_REVISION_0_R", > > Please read DTS coding style before posting next version of the patch (or any > patch for DTS). This is still not aligned. There is (almost) never a blank line > after '='. > > Best regards, > Krzysztof Hi Krzysztof, After checking the DTS coding style, I found the "Indentation" section mentioned that: "For arrays spanning across lines, it is preferred to align the continued entries with opening < from the first line." Should I align the code with following format? (No blank line after = and use two space to align the ") Or would like to ask could you help to provide the dts file that I can follow? gpio-line-names = "HSC1_ALERT1_R_N", "HSC2_ALERT1_R_N", "HSC3_ALERT1_R_N", "HSC4_ALERT1_R_N", "HSC5_ALERT1_R_N", "HSC6_ALERT1_R_N", "HSC7_ALERT1_R_N", "HSC8_ALERT1_R_N", "HSC1_ALERT2_R_N", "HSC2_ALERT2_R_N", "HSC3_ALERT2_R_N", "HSC4_ALERT2_R_N", "HSC5_ALERT2_R_N", "HSC6_ALERT2_R_N", "HSC7_ALERT2_R_N", "HSC8_ALERT2_R_N"; Thanks.
