Quoting Théo Lebrun (2024-07-30 09:04:45)
> @@ -538,7 +544,7 @@ struct clk_hw *__clk_hw_register_divider(struct device *dev,
> struct device_node *np, const char *name,
> const char *parent_name, const struct clk_hw *parent_hw,
> const struct clk_parent_data *parent_data, unsigned long flags,
> - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
> + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags,
It would be better to make this unsigned long instead of u16 (for all
the registration wrappers) so that if we add more flags we don't have to
change these lines again. Seems unlikely we'll have more than 32 flags,
but I could be wrong.
> const struct clk_div_table *table, spinlock_t *lock)
> {
> struct clk_divider *div;
> @@ -610,7 +616,7 @@ EXPORT_SYMBOL_GPL(__clk_hw_register_divider);
> struct clk *clk_register_divider_table(struct device *dev, const char *name,
> const char *parent_name, unsigned long flags,
> void __iomem *reg, u8 shift, u8 width,
> - u8 clk_divider_flags, const struct clk_div_table *table,
> + u16 clk_divider_flags, const struct clk_div_table *table,
> spinlock_t *lock)
> {
> struct clk_hw *hw;
> @@ -664,7 +670,7 @@ struct clk_hw *__devm_clk_hw_register_divider(struct device *dev,
> struct device_node *np, const char *name,
> const char *parent_name, const struct clk_hw *parent_hw,
> const struct clk_parent_data *parent_data, unsigned long flags,
> - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags,
> + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags,
> const struct clk_div_table *table, spinlock_t *lock)
> {
> struct clk_hw **ptr, *hw;
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 4a537260f655..cb348e502e41 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -675,13 +675,15 @@ struct clk_div_table {
> * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used
> * for the divider register. Setting this flag makes the register accesses
> * big endian.
> + * CLK_DIVIDER_EVEN_INTEGERS - clock divisor is 2, 4, 6, 8, 10, etc.
> + * Formula is 2 * (value read from hardware + 1).
> */
> struct clk_divider {
> struct clk_hw hw;
> void __iomem *reg;
> u8 shift;
> u8 width;
> - u8 flags;
> + u16 flags;
This can stay as u16 to save space of course.
> const struct clk_div_table *table;
> spinlock_t *lock;
> };
