On Tue, Aug 27, 2024 at 10:27:55AM +0530, Sricharan R wrote: > Introduce a new compatible and re-use 2_9_0 ops. > While adding a new SoC, please add more info about the controller. Like the hardware revision (internal/synopsys), max number of lanes supported, max link speed, is it a derivative etc... - Mani > Signed-off-by: Nitheesh Sekar <quic_nsekar@xxxxxxxxxxx> > Signed-off-by: Sricharan R <quic_srichara@xxxxxxxxxxx> > --- > [v2] Rebased on top of latest tip and only compatiable addition is required > > drivers/pci/controller/dwc/pcie-qcom.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 6f953e32d990..e814d6cc062d 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -1722,6 +1722,7 @@ static const struct of_device_id qcom_pcie_match[] = { > { .compatible = "qcom,pcie-apq8064", .data = &cfg_2_1_0 }, > { .compatible = "qcom,pcie-apq8084", .data = &cfg_1_0_0 }, > { .compatible = "qcom,pcie-ipq4019", .data = &cfg_2_4_0 }, > + { .compatible = "qcom,pcie-ipq5018", .data = &cfg_2_9_0 }, > { .compatible = "qcom,pcie-ipq6018", .data = &cfg_2_9_0 }, > { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, > { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, > -- > 2.34.1 > -- மணிவண்ணன் சதாசிவம்