On 06/03/15 17:18, Brian Norris wrote:
> This core originated in Set-Top Box chips (BCM7xxx) but is used in a
> variety of other Broadcom chips, including some BCM63xxx, BCM33xx, and
> iProc/Cygnus. It's been used only on ARM and MIPS SoCs, so restrict it
> to those architectures.
>
> There are multiple revisions of this core throughout the years, and
> almost every version broke register compatibility in some small way, but
> with some effort, this driver is able to support v4.0, v5.0, v6.x, v7.0,
> and v7.1. It's been tested on v5.0, v6.0, v7.0, and v7.1 recently, so
> there hopefully are no more lurking inconsistencies.
>
> Signed-off-by: Brian Norris <computersforpeace@xxxxxxxxx>
> ---
Looks good to me, just one nitpick below:
[snip]
> +static int brcmnand_revision_init(struct brcmnand_controller *ctrl)
> +{
> + static const unsigned int block_sizes_v6[] = { 8, 16, 128, 256, 512, 1024, 2048, 0 };
> + static const unsigned int block_sizes_v4[] = { 16, 128, 8, 512, 256, 1024, 2048, 0 };
> + static const unsigned int page_sizes[] = { 512, 2048, 4096, 8192, 0 };
> +
> + ctrl->nand_version = nand_readreg(ctrl, 0) & 0xffff;
> +
> + /* Only support v4.0+? */
> + if (ctrl->nand_version < 0x0400)
> + return -ENODEV;
It could be nice to have an informative error message here that this is
either:
- an unknown controller revision (> 7.1)
- an older controller revision
- a check against the compatible property, just in case?
[snip]
> + ctrl->cs_offsets = brcmnand_cs_offsets_v71;
> + } else {
> + ctrl->cs_offsets = brcmnand_cs_offsets;
> +
> + /* pre-v5.0 has a different CS0 offset layout */
> + if (ctrl->nand_version <= 0x0500)
> + ctrl->cs0_offsets = brcmnand_cs_offsets_cs0;
Based on this check, should the comment should be "pre-v5.0 and v5.0
have a different CS0 offset layout"?
--
Florian
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