RE: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM AHCI SATA

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> -----Original Message-----
> From: Niklas Cassel <cassel@xxxxxxxxxx>
> Sent: 2024年8月9日 0:24
> To: Frank Li <frank.li@xxxxxxx>
> Cc: Hongxing Zhu <hongxing.zhu@xxxxxxx>; tj@xxxxxxxxxx;
> dlemoal@xxxxxxxxxx; robh@xxxxxxxxxx; krzk+dt@xxxxxxxxxx;
> conor+dt@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> festevam@xxxxxxxxx; linux-ide@xxxxxxxxxxxxxxx; stable@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> kernel@xxxxxxxxxxxxxx
> Subject: Re: [PATCH v4 4/6] ata: ahci_imx: Add 32bits DMA limit for i.MX8QM
> AHCI SATA
> 
> On Thu, Aug 08, 2024 at 10:03:17AM -0400, Frank Li wrote:
> > On Thu, Aug 08, 2024 at 12:35:01AM +0200, Niklas Cassel wrote:
> > > On Fri, Aug 02, 2024 at 02:30:45AM +0000, Hongxing Zhu wrote:
> > > > >
> > > > Hi Niklas:
> > > > I'm so sorry to reply late.
> > > > About the 32bit DMA limitation of i.MX8QM AHCI SATA.
> > > > It's seems that one "dma-ranges" property in the DT can let
> > > > i.MX8QM SATA  works fine in my past days tests without this commit.
> > > > How about drop these driver changes, and add "dma-ranges" for i.MX8QM
> SATA?
> > > > Thanks a lot for your kindly help.
> > >
> > > Hello Richard,
> > >
> > > did you try my suggested patch above?
> > >
> > >
> > > If you look at dma-ranges:
> > > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fde
> > > vicetree-specification.readthedocs.io%2Fen%2Flatest%2Fchapter2-devic
> > >
> etree-basics.html%23dma-ranges&data=05%7C02%7Chongxing.zhu%40nxp.co
> m
> > > %7Cb18159f7aa424f3e0d8f08dcb7c68f38%7C686ea1d3bc2b4c6fa92cd99c
> 5c3016
> > >
> 35%7C0%7C0%7C638587310631122078%7CUnknown%7CTWFpbGZsb3d8eyJ
> WIjoiMC4w
> > >
> LjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7C%7C%
> 7C&
> > >
> sdata=uYJFF7Mci4j068LF1Ew8qrFvc1pzrmWhJS0UqaWtvYQ%3D&reserved=0
> > >
> > > "dma-ranges" property should be used on a bus device node (such as
> > > PCI host bridges).
> >
> > Yes, 32bit is limited by internal bus farbic, not AHCI controller.
> 
> If the limit is by the interconnect/bus, then the limit will affect all devices
> connected to that bus, i.e. both the PCIe controller and the AHCI controller, and
> using "dma-ranges" in that case is of course correct.
> 
> I guess I'm mostly surprised that i.MX8QM doesn't already have this property
> defined in its device tree.
> 
> Anyway, please send a v5 of this series without the patch in $subject, and we
> should be able to queue it up for 6.12.
Hi Niklas:
Thank you very much.
I had already sent out the v5 series patch-set a few days ago.
https://patchwork.kernel.org/project/linux-arm-kernel/cover/1722581213-15221-1-git-send-email-hongxing.zhu@xxxxxxx/
BTW, I'm a little confused about " without the patch in $subject,".
Do you mean to remove the "PATCH" from Subject of each patch?
v5:
Subject: [PATCH v5 1/5] dt-bindings: ata: Add i.MX8QM AHCI compatible string
v6 without patch in $subject:
Subject: [ v6 1/5] dt-bindings: ata: Add i.MX8QM AHCI compatible string
If yes, I can do that and add Frank's reviewed-by tag in the v6 series.

Best Regards
Richard Zhu
> 
> 
> Kind regards,
> Niklas




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