On Fri, Jul 19, 2024 at 01:42:14PM +0800, Richard Zhu wrote:
> Since i.MX8QM AHCI SATA only has 32bits DMA capability.
> Add 32bits DMA limit here.
>
> Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
> ---
> drivers/ata/ahci_imx.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/ata/ahci_imx.c b/drivers/ata/ahci_imx.c
> index 4dd98368f8562..e94c0fdea2260 100644
> --- a/drivers/ata/ahci_imx.c
> +++ b/drivers/ata/ahci_imx.c
> @@ -827,6 +827,9 @@ static const struct scsi_host_template ahci_platform_sht = {
>
> static int imx8_sata_probe(struct device *dev, struct imx_ahci_priv *imxpriv)
> {
> + if (!(dev->bus_dma_limit))
> + dev->bus_dma_limit = DMA_BIT_MASK(32);
> +
> imxpriv->sata_phy = devm_phy_get(dev, "sata-phy");
> if (IS_ERR(imxpriv->sata_phy))
> return dev_err_probe(dev, PTR_ERR(imxpriv->sata_phy),
> --
> 2.37.1
>
Why is this needed?
ahci_imx.c calls ahci_platform_init_host(), which calls
dma_coerce_mask_and_coherent():
https://github.com/torvalds/linux/blob/v6.10/drivers/ata/libahci_platform.c#L750-L756
Should this code perhaps look more like:
https://github.com/torvalds/linux/blob/v6.10/drivers/ata/ahci.c#L1048-L1054
where we set it to 64 or 32 bit explicitly.
Does this solve your problem:
diff --git a/drivers/ata/libahci_platform.c b/drivers/ata/libahci_platform.c
index 581704e61f28..fc86e2c8c42b 100644
--- a/drivers/ata/libahci_platform.c
+++ b/drivers/ata/libahci_platform.c
@@ -747,12 +747,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
ap->ops = &ata_dummy_port_ops;
}
- if (hpriv->cap & HOST_CAP_64) {
- rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
- if (rc) {
- dev_err(dev, "Failed to enable 64-bit DMA.\n");
- return rc;
- }
+ rc = dma_coerce_mask_and_coherent(dev,
+ DMA_BIT_MASK((hpriv->cap & HOST_CAP_64) ? 64 : 32));
+ if (rc) {
+ dev_err(dev, "DMA enable failed\n");
+ return rc;
}
rc = ahci_reset_controller(host);
Kind regards,
Niklas
