This patch series aims to add support for RZ/G2UL DU.
The LCD controller is composed of Frame Compression Processor (FCPVD),
Video Signal Processor (VSPD), and Display Unit (DU).
The output of LCDC is connected display parallel interface (DPI) and
supports a maximum resolution of WXGA along with 2 RPFs to support the
blending of two picture layers and raster operations (ROPs)
It is similar to LCDC IP on RZ/G2L SoCs, but does not have DSI interface.
v2->v3:
* Split patch series based on subsystem from DU patch series [1].
* Replaced ports->port property for RZ/G2UL as it supports only DPI
and retained ports property for RZ/{G2L,V2L} as it supports both DSI
and DPI output interface.
* Added missing blank line before example.
* Dropped tags from Conor and Geert as there are new changes in bindings
* Avoided the line break in rzg2l_du_start_stop() for rstate.
* Replaced port->du_output in struct rzg2l_du_output_routing and
dropped using the port number to indicate the output type in
rzg2l_du_encoders_init().
* Updated rzg2l_du_r9a07g043u_info and rzg2l_du_r9a07g044_info.
[1] https://lore.kernel.org/all/20240709135152.185042-1-biju.das.jz@xxxxxxxxxxxxxx/
v1->v2:
* Updated cover letter header "DU IP->Display Unit".
* Updated commit description related to non ABI breakage for patch#3.
* Added Ack from Conor for binding patches.
Biju Das (4):
dt-bindings: display: renesas,rzg2l-du: Document RZ/G2UL DU bindings
drm: renesas: rz-du: Add RZ/G2UL DU Support
arm64: dts: renesas: r9a07g043u: Add DU node
arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
.../bindings/display/renesas,rzg2l-du.yaml | 35 +++++-
arch/arm64/boot/dts/renesas/r9a07g043u.dtsi | 19 +++
.../boot/dts/renesas/r9a07g043u11-smarc.dts | 109 ++++++++++++++++++
drivers/gpu/drm/renesas/rz-du/rzg2l_du_crtc.c | 8 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c | 18 ++-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.h | 5 +-
drivers/gpu/drm/renesas/rz-du/rzg2l_du_kms.c | 4 +-
7 files changed, 188 insertions(+), 10 deletions(-)
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2.43.0
